diff --git a/Code/SmartCarV1.code-workspace b/Code/SmartCarV1.code-workspace index 7473510..53c7c4b 100644 --- a/Code/SmartCarV1.code-workspace +++ b/Code/SmartCarV1.code-workspace @@ -60,7 +60,8 @@ "bsp_timer.h": "c", "bsp_led.h": "c", "stm32f10x_conf.h": "c", - "stdio.h": "c" + "stdio.h": "c", + "mw_debug_log.h": "c" }, diff --git a/Code/app/src/app_led.c b/Code/app/src/app_led.c index 89c7ec6..5307d00 100644 --- a/Code/app/src/app_led.c +++ b/Code/app/src/app_led.c @@ -13,6 +13,7 @@ #include "app_led.h" #include "mw_led.h" #include "mw_soft_timer.h" +#include "mw_debug_log.h" #include "stdint.h" #include "stdio.h" // #include "mw_soft_timer.h" @@ -103,6 +104,8 @@ void app_led_indicator_idleMode(void) tmp_indicator_single_mode_state = 1; // 新状态 is_new_state = 1; + + DEBUG_LOG("Idle! \n"); } else { @@ -167,6 +170,7 @@ void app_led_indicator_runningMode(void) tmp_indicator_single_mode_state = 1; // 新状态 is_new_state = 1; + DEBUG_LOG("Running! \n"); } else { @@ -231,6 +235,7 @@ void app_led_indicator_runningMode(void) tmp_indicator_single_mode_state = 1; // 新状态 is_new_state = 1; + DEBUG_LOG("Fault! \n"); } else { diff --git a/Code/app/src/main.c b/Code/app/src/main.c index e72be91..bb5d83a 100644 --- a/Code/app/src/main.c +++ b/Code/app/src/main.c @@ -32,6 +32,8 @@ void bsp_init(void) { bsp_timer_init(); + + bsp_usart_debug_init(); // bsp_InitTimer(); // bsp_usart_1_init(115200); // bsp_Init(); diff --git a/Code/bsp/inc/bsp_timer-old.h b/Code/bsp/inc/bsp_timer-old.h deleted file mode 100644 index 70d4272..0000000 --- a/Code/bsp/inc/bsp_timer-old.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __BSP_TIMER_H__ -#define __BSP_TIMER_H__ - -void bsp_timer_init(void); - -#endif diff --git a/Code/bsp/inc/bsp_usart.h b/Code/bsp/inc/bsp_usart.h index c94798d..a21eceb 100644 --- a/Code/bsp/inc/bsp_usart.h +++ b/Code/bsp/inc/bsp_usart.h @@ -3,23 +3,12 @@ #include "stdint.h" -typedef enum -{ - usart0_enum = 0, - usart1_enum = 1, - usart2_enum = 2, - usart3_enum = 3, - usart4_enum = 4, - usart5_enum = 5, - usart_cnt_enum = 6 -}usart_type_Enum; +void bsp_usart_debug_init(void); -void bsp_usart_1_init(uint32_t baud); +// void bsp_usart_send_data(usart_type_Enum e_usart_type, uint16_t us_tx_data); -void bsp_usart_send_data(usart_type_Enum e_usart_type, uint16_t us_tx_data); - -uint16_t bsp_usart_receive_data(usart_type_Enum e_usart_type); +// uint16_t bsp_usart_receive_data(usart_type_Enum e_usart_type); #endif diff --git a/Code/bsp/src/bsp_usart.c b/Code/bsp/src/bsp_usart.c index 47fa80f..f3ce35c 100644 --- a/Code/bsp/src/bsp_usart.c +++ b/Code/bsp/src/bsp_usart.c @@ -6,38 +6,45 @@ #include "stm32f10x.h" #include "stdio.h" -#define USART_DEBUG_TYPE (USART1) + + +/* debug log专用的usart外设 */ +#define USART_DEBUG_TYPE (USART2) +#define USART_DEBUG_PERIPH_RCC (RCC_APB1Periph_USART2) +#define USART_DEBUG_GPIO_RCC (RCC_APB2Periph_GPIOA) #define USART_DEBUG_TX_PORT (GPIOA) -#define USART_DEBUG_TX_PIN (GPIO_Pin_9) - +#define USART_DEBUG_TX_PIN (GPIO_Pin_2) #define USART_DEBUG_RX_PORT (GPIOA) -#define USART_DEBUG_RX_PIN (GPIO_Pin_10) +#define USART_DEBUG_RX_PIN (GPIO_Pin_3) +#define USART_DEBUG_BAUD (115200u) - -#define EN_USART1_RX (1) +#define EN_USART1_RX (0) /********************************************************************************** - * @brief usart1 initial function + * @brief 用于debug的串口初始化 * @param baud * @note * @retval None ********************************************************************************* */ -void bsp_usart_1_init(uint32_t baud) +void bsp_usart_debug_init(void) { GPIO_InitTypeDef GPIO_InitStructure; USART_InitTypeDef USART_InitStructure; NVIC_InitTypeDef NVIC_InitStructure; /* 1. 串口时钟使能，GPIO 时钟使能，复用时钟使能 */ - //使能 USART1,GPIOA 时钟 - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); - + //使能 USART1,GPIOA 时钟 + // RCC_APB2PeriphClockCmd(USART_DEBUG_PERIPH_RCC | USART_DEBUG_GPIO_RCC, ENABLE); + //使能 USART2,GPIOA 时钟 + RCC_APB2PeriphClockCmd(USART_DEBUG_GPIO_RCC, ENABLE); + // usart1在APB2上 ，而usart2在APB1上 + RCC_APB1PeriphClockCmd(USART_DEBUG_PERIPH_RCC, ENABLE); /* 2. 串口复位 */ USART_DeInit(USART_DEBUG_TYPE); /* 3. GPIO 端口模式设置*/ // Usart1_TX - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStructure.GPIO_Pin = USART_DEBUG_TX_PIN; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; // 复用推挽输出 GPIO_Init(USART_DEBUG_TX_PORT, &GPIO_InitStructure); @@ -46,7 +53,7 @@ void bsp_usart_1_init(uint32_t baud) GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //浮空输入 GPIO_Init(USART_DEBUG_RX_PORT, &GPIO_InitStructure); /* 4. 串口参数初始化 */ - USART_InitStructure.USART_BaudRate = baud; + USART_InitStructure.USART_BaudRate = USART_DEBUG_BAUD; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_Parity = USART_Parity_No; //无奇偶校验位 @@ -68,68 +75,7 @@ void bsp_usart_1_init(uint32_t baud) USART_Cmd(USART_DEBUG_TYPE, ENABLE); } -/********************************************************************************** - * @brief send one uint16_t data via usart. - * @param e_usart_type, us_tx_data - * @note 需要根据不同的芯片来改变它 - * @retval None - ********************************************************************************* -*/ -void bsp_usart_send_data(usart_type_Enum e_usart_type, uint16_t us_tx_data) -{ - switch(e_usart_type) - { - case usart0_enum: - break; - case usart1_enum: - USART_SendData(USART1, us_tx_data); - break; - case usart2_enum: - USART_SendData(USART2, us_tx_data); - break; - case usart3_enum: - USART_SendData(USART3, us_tx_data); - break; - case usart4_enum: - USART_SendData(UART4, us_tx_data); - break; - default: - break; - } -} -// /********************************************************************************** -// * @brief 接收 -// * @param e_usart_type: 抽象出来的usart类型 -// * @note 需要根据不同的芯片来改变它 -// * @retval None -// ********************************************************************************* -// */ -// uint16_t bsp_usart_receive_data(usart_type_Enum e_usart_type) -// { -// uint16_t retVal = 0; -// switch(e_usart_type) -// { -// case usart0_enum: -// break; -// case usart1_enum: -// retVal = USART_ReceiveData(USART1); -// break; -// case usart2_enum: -// retVal = USART_ReceiveData(USART2); -// break; -// case usart3_enum: -// retVal = USART_ReceiveData(USART3); -// break; -// case usart4_enum: -// retVal = USART_ReceiveData(UART4); -// break; -// default: -// break; -// } -// return retVal; -// } - -//加入以下代码,支持 printf 函数,而不需要选择 use MicroLIB +// //加入以下代码,支持 printf 函数,而不需要选择 use MicroLIB #if 1 #pragma import(__use_no_semihosting) //标准库需要的支持函数 @@ -143,11 +89,19 @@ _sys_exit(int x) { x = x; } -//重定义 fputc 函数 +/************************************************************************************* + * @brief 重定义 fputc 函数 + * @param[in/out] ch 【参数注释】 + * @param[in/out] f 【参数注释】 + * @return int 【返回值注释】 + * + * @warning 【不可重入,阻塞等警告】 + * @note 【重大修改】 + *************************************************************************************/ int fputc(int ch, FILE *f) { - while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET); - USART_SendData(USART1,(uint8_t)ch); + while(USART_GetFlagStatus(USART_DEBUG_TYPE,USART_FLAG_TC)==RESET); + USART_SendData(USART_DEBUG_TYPE,(uint8_t)ch); return ch; } diff --git a/Code/middleware/DebugLog/DebugLog.c b/Code/middleware/DebugLog/DebugLog.c deleted file mode 100644 index e69de29..0000000 diff --git a/Code/middleware/DebugLog/DebugLog.h b/Code/middleware/DebugLog/DebugLog.h deleted file mode 100644 index e69de29..0000000 diff --git a/Code/middleware/DebugLog/mw_debug_log.c b/Code/middleware/DebugLog/mw_debug_log.c new file mode 100644 index 0000000..49bff29 --- /dev/null +++ b/Code/middleware/DebugLog/mw_debug_log.c @@ -0,0 +1,7 @@ +#include "mw_debug_log.h" +#include + +// void mw_log(const char *format, ...) +// { +// printf(format); +// } diff --git a/Code/middleware/DebugLog/mw_debug_log.h b/Code/middleware/DebugLog/mw_debug_log.h new file mode 100644 index 0000000..d66baf4 --- /dev/null +++ b/Code/middleware/DebugLog/mw_debug_log.h @@ -0,0 +1,8 @@ +#ifndef __MW_DEBUG_LOG_H__ +#define __MW_DEBUG_LOG_H__ + +// void mw_log(const char *format, ...); + +#define DEBUG_LOG (printf) + +#endif diff --git a/Document/官方参考手册/STM32F103X8_XB_数据手册.pdf b/Document/官方参考手册/STM32F103X8_XB_数据手册.pdf new file mode 100644 index 0000000..a6b3778 --- /dev/null +++ b/Document/官方参考手册/STM32F103X8_XB_数据手册.pdf @@ -0,0 +1,6524 @@ + STM32F103x8 + STM32F103xB + +Medium-density performance line ARM®-based 32-bit MCU with 64 + or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 com. interfaces + + Datasheet - production data + +Features VFQFPN36 6 × 6 mm UFQFPN48 7 × 7 mm + +• ARM® 32-bit Cortex®-M3 CPU Core BGA100 10 × 10 mm LQFP100 14 × 14 mm + – 72 MHz maximum frequency, UFBGA100 7 x 7 mm LQFP64 10 × 10 mm + 1.25 DMIPS/MHz (Dhrystone 2.1) + performance at 0 wait state memory BGA64 5 × 5 mm LQFP48 7 × 7 mm + access + – Single-cycle multiplication and hardware • Debug mode + division + – Serial wire debug (SWD) & JTAG +• Memories interfaces + – 64 or 128 Kbytes of Flash memory + – 20 Kbytes of SRAM • 7 timers + +• Clock, reset and supply management – Three 16-bit timers, each with up to 4 + – 2.0 to 3.6 V application supply and I/Os IC/OC/PWM or pulse counter and + – POR, PDR, and programmable voltage quadrature (incremental) encoder input + detector (PVD) + – 4-to-16 MHz crystal oscillator – 16-bit, motor control PWM timer with dead- + – Internal 8 MHz factory-trimmed RC time generation and emergency stop + – Internal 40 kHz RC + – PLL for CPU clock – 2 watchdog timers (Independent and + – 32 kHz oscillator for RTC with calibration Window) + +• Low-power – SysTick timer 24-bit downcounter + – Sleep, Stop and Standby modes + – VBAT supply for RTC and backup registers • Up to 9 communication interfaces + – Up to 2 x I2C interfaces (SMBus/PMBus) +• 2 x 12-bit, 1 µs A/D converters (up to 16 + channels) – Up to 3 USARTs (ISO 7816 interface, LIN, + – Conversion range: 0 to 3.6 V IrDA capability, modem control) + – Dual-sample and hold capability + – Temperature sensor – Up to 2 SPIs (18 Mbit/s) + +• DMA – CAN interface (2.0B Active) + – 7-channel DMA controller + – Peripherals supported: timers, ADC, SPIs, – USB 2.0 full-speed interface + I2Cs and USARTs + • CRC calculation unit, 96-bit unique ID +• Up to 80 fast I/O ports • Packages are ECOPACK® + – 26/37/51/80 I/Os, all mappable on 16 + external interrupt vectors and almost all Table 1. Device summary + 5 V-tolerant + Reference Part number + + STM32F103x8 STM32F103C8, STM32F103R8 + STM32F103V8, STM32F103T8 + + STM32F103xB STM32F103RB STM32F103VB, + STM32F103CB, STM32F103TB + +August 2015 DocID13587 Rev 17 1/117 + +This is information on a product in full production. www.st.com + Contents STM32F103x8, STM32F103xB + +Contents + +1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 + +2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 + + 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 + + 2.2 Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 13 + + 2.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 + + 2.3.1 ARM® Cortex®-M3 core with embedded Flash and SRAM . . . . . . . . . . 14 + + 2.3.2 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 + + 2.3.3 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 14 + + 2.3.4 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 + + 2.3.5 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 14 + + 2.3.6 External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 15 + + 2.3.7 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 + + 2.3.8 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 + + 2.3.9 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 + + 2.3.10 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 + + 2.3.11 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 + + 2.3.12 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 + + 2.3.13 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 + + 2.3.14 RTC (real-time clock) and backup registers . . . . . . . . . . . . . . . . . . . . . . 17 + + 2.3.15 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 + + 2.3.16 I²C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 + + 2.3.17 Universal synchronous/asynchronous receiver transmitter (USART) . . 19 + + 2.3.18 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 + + 2.3.19 Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 + + 2.3.20 Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 + + 2.3.21 GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . 20 + + 2.3.22 ADC (analog-to-digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 + + 2.3.23 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 + + 2.3.24 Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 20 + +3 Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 + +4 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 + +2/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Contents + +5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 + + 5.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 + + 5.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 + + 5.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 + + 5.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 + + 5.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 + + 5.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 + + 5.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 + + 5.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 + + 5.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 + + 5.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 + + 5.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 + + 5.3.2 Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 39 + + 5.3.3 Embedded reset and power control block characteristics . . . . . . . . . . . 40 + + 5.3.4 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 + + 5.3.5 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 + + 5.3.6 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 + + 5.3.7 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 + + 5.3.8 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 + + 5.3.9 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 + + 5.3.10 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 + + 5.3.11 Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 60 + + 5.3.12 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 + + 5.3.13 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 + + 5.3.14 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 + + 5.3.15 TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 + + 5.3.16 Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 + + 5.3.17 CAN (controller area network) interface . . . . . . . . . . . . . . . . . . . . . . . . 74 + + 5.3.18 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 + + 5.3.19 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 + +6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 + + 6.1 VFQFPN36 6 x 6 mm, 0.5 mm pitch, package information . . . . . . . . . . . 80 + + 6.2 UFQFPN48 7 x 7 mm, 0.5 mm pitch, package information . . . . . . . . . . . 84 + + 6.3 LFBGA100 10 x 10 mm, low-profile fine pitch ball grid array + package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 + + DocID13587 Rev 17 3/117 + + 4 + Contents STM32F103x8, STM32F103xB + + 6.4 LQFP100 14 x 14 mm, 100-pin low-profile quad flat package information 90 + 6.5 UFBGA100 7x 7 mm, ultra fine pitch ball grid array package information 93 + 6.6 LQFP64 10 x 10 mm, 64-pin low-profile quad flat package information . . 96 + 6.7 TFBGA64 5 x 5 mm, thin profile fine pitch package information . . . . . . . 99 + 6.8 LQFP48 7 x 7 mm, 48-pin low-profile quad flat package information . . . 102 + 6.9 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 + + 6.9.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 + 6.9.2 Selecting the product temperature range . . . . . . . . . . . . . . . . . . . . . . 106 + +7 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 + +8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 + +4/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB List of tables + +List of tables + +Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 +Table 2. STM32F103xx medium-density device features and peripheral counts . . . . . . . . . . . . . . . 10 +Table 3. STM32F103xx family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 +Table 4. Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 +Table 5. Medium-density STM32F103xx pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 +Table 6. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 +Table 7. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 +Table 8. Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 +Table 9. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 +Table 10. Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 +Table 11. Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 40 +Table 12. Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 +Table 13. Maximum current consumption in Run mode, code with data processing + running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 +Table 14. Maximum current consumption in Run mode, code with data processing + running from RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 +Table 15. Maximum current consumption in Sleep mode, code running from Flash or RAM. . . . . . . 44 +Table 16. Typical and maximum current consumptions in Stop and Standby modes . . . . . . . . . . . . 45 +Table 17. Typical current consumption in Run mode, code with data processing + running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 +Table 18. Typical current consumption in Sleep mode, code running from Flash or + RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 +Table 19. Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 +Table 20. High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 +Table 21. Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 +Table 22. HSE 4-16 MHz oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 +Table 23. LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 +Table 24. HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 +Table 25. LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 +Table 26. Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 +Table 27. PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 +Table 28. Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 +Table 29. Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 +Table 30. EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 +Table 31. EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 +Table 32. ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 +Table 33. Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 +Table 34. I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 +Table 35. I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 +Table 36. Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 +Table 37. I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 +Table 38. NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 +Table 39. TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 +Table 40. I2C characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 +Table 41. SCL frequency (fPCLK1= 36 MHz.,VDD_I2C = 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 +Table 42. SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 +Table 43. USB startup time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 +Table 44. USB DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 + + DocID13587 Rev 17 5/117 + + 6 + List of tables STM32F103x8, STM32F103xB + +Table 45. USB: Full-speed electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 +Table 46. ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 +Table 47. RAIN max for fADC = 14 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 +Table 48. ADC accuracy - limited test conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 +Table 49. ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 +Table 50. TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 +Table 51. VFQFPN36 - 36-pin, 6x6 mm, 0.5 mm pitch very thin profile fine pitch quad + flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 +Table 52. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat + package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 +Table 53. LFBGA100 – 100-ball low-profile fine pitch ball grid array, 10 x 10 mm, + 0.8 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 +Table 54. LFBGA100 recommended PCB design rules (0.8 mm pitch BGA). . . . . . . . . . . . . . . . . . . 88 +Table 55. LQPF100, 14 x 14 mm 100-pin low-profile quad flat package mechanical data. . . . . . . . . 90 +Table 56. UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array + package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 +Table 57. UFBGA100 recommended PCB design rules (0.5 mm pitch BGA) . . . . . . . . . . . . . . . . . . 94 +Table 58. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package + mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 +Table 59. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball grid + array package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 +Table 60. TFBGA64 recommended PCB design rules (0.5 mm pitch BGA). . . . . . . . . . . . . . . . . . . 100 +Table 61. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package + mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 +Table 62. Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 +Table 63. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 +Table 64. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 + +6/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB List of figures + +List of figures + +Figure 1. STM32F103xx performance line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 +Figure 2. Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 +Figure 3. STM32F103xx performance line LFBGA100 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 +Figure 4. STM32F103xx performance line LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 +Figure 5. STM32F103xx performance line UFBGA100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 +Figure 6. STM32F103xx performance line LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 +Figure 7. STM32F103xx performance line TFBGA64 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 +Figure 8. STM32F103xx performance line LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 +Figure 9. STM32F103xx performance line UFQFPN48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 +Figure 10. STM32F103xx performance line VFQFPN36 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 +Figure 11. Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 +Figure 12. Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 +Figure 13. Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 +Figure 14. Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 +Figure 15. Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 +Figure 16. Typical current consumption in Run mode versus frequency (at 3.6 V) - + code with data processing running from RAM, peripherals enabled. . . . . . . . . . . . . . . . . . 43 +Figure 17. Typical current consumption in Run mode versus frequency (at 3.6 V) - + code with data processing running from RAM, peripherals disabled . . . . . . . . . . . . . . . . . 43 +Figure 18. Typical current consumption on VBAT with RTC on versus temperature at different + VBAT values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 +Figure 19. Typical current consumption in Stop mode with regulator in Run mode versus + temperature at VDD = 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 +Figure 20. Typical current consumption in Stop mode with regulator in Low-power mode versus + temperature at VDD = 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 +Figure 21. Typical current consumption in Standby mode versus temperature at + VDD = 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 +Figure 22. High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 +Figure 23. Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 +Figure 24. Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 +Figure 25. Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 +Figure 26. Standard I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 +Figure 27. Standard I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 +Figure 28. 5 V tolerant I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 +Figure 29. 5 V tolerant I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 +Figure 30. I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 +Figure 31. Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 +Figure 32. I2C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 +Figure 33. SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 +Figure 34. SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 +Figure 35. SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 +Figure 36. USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 +Figure 37. ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 +Figure 38. Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 +Figure 39. Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . . 78 +Figure 40. Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . . 79 +Figure 41. VFQFPN36 - 36-pin, 6x6 mm, 0.5 mm pitch very thin profile fine pitch quad + flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 + + DocID13587 Rev 17 7/117 + + 8 + List of figures STM32F103x8, STM32F103xB + +Figure 42. VFQFPN36 - 36-pin, 6x6 mm, 0.5 mm pitch very thin profile fine pitch quad + flat package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 +Figure 43. VFPFPN36 package top view example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 +Figure 44. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat + package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 +Figure 45. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat + package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 +Figure 46. UFQFPN48 7 x 7 mm, 0.5 mm pitch, package top view example . . . . . . . . . . . . . . . . . . . 86 +Figure 47. LFBGA100 - 100-ball low-profile fine pitch ball grid array, 10 x10 mm, + 0.8 mm pitch, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 +Figure 48. LFBGA100 – 100-ball low-profile fine pitch ball grid array, 10 x 10 mm, + 0.8 mm pitch, package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 +Figure 49. LFBGA100 package top view example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 +Figure 50. LQFP100, 14 x 14 mm 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . 90 +Figure 51. LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat + package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 +Figure 52. LQFP100 package top view example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 +Figure 53. UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid + array package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 +Figure 54. UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid + array package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 +Figure 55. UFBGA100 package top view example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 +Figure 56. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . . 96 +Figure 57. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package + recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 +Figure 58. LQFP64 package top view example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 +Figure 59. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball grid + array package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 +Figure 60. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball grid + array package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 +Figure 61. TFBGA64 package top view example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 +Figure 62. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . . . 102 +Figure 63. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package + recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 +Figure 64. LQFP48 package top view example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 +Figure 65. LQFP100 PD max vs. TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 + +8/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Introduction + +1 Introduction + + This datasheet provides the ordering information and mechanical device characteristics of + the STM32F103x8 and STM32F103xB medium-density performance line microcontrollers. + For more details on the whole STMicroelectronics STM32F103xx family, please refer to + Section 2.2: Full compatibility throughout the family. + + The medium-density STM32F103xx datasheet should be read in conjunction with the low-, + medium- and high-density STM32F10xxx reference manual. + The reference and Flash programming manuals are both available from the + STMicroelectronics website www.st.com. + + For information on the Cortex®-M3 core please refer to the Cortex®-M3 Technical Reference + Manual, available from the www.arm.com website. + +2 Description + + The STM32F103xx medium-density performance line family incorporates the high- + performance ARM® Cortex®-M3 32-bit RISC core operating at a 72 MHz frequency, high- + speed embedded memories (Flash memory up to 128 Kbytes and SRAM up to 20 Kbytes), + and an extensive range of enhanced I/Os and peripherals connected to two APB buses. All + devices offer two 12-bit ADCs, three general purpose 16-bit timers plus one PWM timer, as + well as standard and advanced communication interfaces: up to two I2Cs and SPIs, three + USARTs, an USB and a CAN. + + The devices operate from a 2.0 to 3.6 V power supply. They are available in both the –40 to + +85 °C temperature range and the –40 to +105 °C extended temperature range. A + comprehensive set of power-saving mode allows the design of low-power applications. + + The STM32F103xx medium-density performance line family includes devices in six different + package types: from 36 pins to 100 pins. Depending on the device chosen, different sets of + peripherals are included, the description below gives an overview of the complete range of + peripherals proposed in this family. + + These features make the STM32F103xx medium-density performance line microcontroller + family suitable for a wide range of applications such as motor drives, application control, + medical and handheld equipment, PC and gaming peripherals, GPS platforms, industrial + applications, PLCs, inverters, printers, scanners, alarm systems, video intercoms, and + HVACs. + + DocID13587 Rev 17 9/117 + + 116 + Description STM32F103x8, STM32F103xB + +2.1 Device overview + + Table 2. STM32F103xx medium-density device features and peripheral + counts + + Peripheral STM32F103Tx STM32F103Cx STM32F103Rx STM32F103Vx + + Flash - Kbytes 64 128 64 128 64 128 64 128 + + SRAM - Kbytes 20 20 20 20 + + Timers General-purpose 3 3 3 3 + + Advanced-control 1 1 1 1 + + Communication SPI 1 2 2 2 + + I2C 1 2 2 2 + + USART 2 3 3 3 + + USB 1 1 1 1 + + CAN 1 1 1 1 + + GPIOs 26 37 51 80 + + 12-bit synchronized ADC 2 2 2 2 + Number of channels 10 channels 10 channels 16 channels(1) 16 channels + + CPU frequency 72 MHz + + Operating voltage 2.0 to 3.6 V + + Operating temperatures Ambient temperatures: -40 to +85 °C / -40 to +105 °C (see Table 9) + Packages Junction temperature: -40 to + 125 °C (see Table 9) + + VFQFPN36 LQFP48, LQFP64, LQFP100, + UFQFPN48 TFBGA64 LFBGA100, + UFBGA100 + + 1. On the TFBGA64 package only 15 channels are available (one analog input pin has been replaced by + ‘Vref+’). + +10/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Description + + Figure 1. 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DL + + 0&2 + + 1. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is + 64 MHz. + + 2. For the USB function to be available, both HSE and PLL must be enabled, with USBCLK running at 48 + MHz. + + 3. To have an ADC conversion time of 1 µs, APB2 must be at 14 MHz, 28 MHz or 56 MHz. + +12/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Description + +2.2 Full compatibility throughout the family + + The STM32F103xx is a complete family whose members are fully pin-to-pin, software and + feature compatible. In the reference manual, the STM32F103x4 and STM32F103x6 are + identified as low-density devices, the STM32F103x8 and STM32F103xB are referred to as + medium-density devices, and the STM32F103xC, STM32F103xD and STM32F103xE are + referred to as high-density devices. + + Low- and high-density devices are an extension of the STM32F103x8/B devices, they are + specified in the STM32F103x4/6 and STM32F103xC/D/E datasheets, respectively. Low- + density devices feature lower Flash memory and RAM capacities, less timers and + peripherals. High-density devices have higher Flash memory and RAM capacities, and + additional peripherals like SDIO, FSMC, I2S and DAC, while remaining fully compatible with + the other members of the STM32F103xx family. + + The STM32F103x4, STM32F103x6, STM32F103xC, STM32F103xD and STM32F103xE + are a drop-in replacement for STM32F103x8/B medium-density devices, allowing the user + to try different memory densities and providing a greater degree of freedom during the + development cycle. + + Moreover, the STM32F103xx performance line family is fully compatible with all existing + STM32F101xx access line and STM32F102xx USB access line devices. + + Table 3. STM32F103xx family + + Low-density devices Medium-density devices High-density devices + + Pinout 16 KB 32 KB 64 KB 128 KB 256 KB 384 KB 512 KB + Flash Flash Flash Flash Flash Flash Flash + + 6 KB RAM 10 KB RAM 20 KB RAM 20 KB RAM 48 KB RAM 64 KB RAM 64 KB RAM + + 144 - - - - 5 × USARTs + + 100 - - 4 × 16-bit timers, 2 × basic timers + 3 × SPIs, 2 × I2Ss, 2 × I2Cs + 3 × USARTs + 64 2 × USARTs 3 × 16-bit timers USB, CAN, 2 × PWM timers + 2 × 16-bit timers 2 × SPIs, 2 × I2Cs, USB, 3 × ADCs, 2 × DACs, 1 × SDIO + 1 × SPI, 1 × I2C, USB, CAN, 1 × PWM timer FSMC (100 and 144 pins) + + 48 CAN, 1 × PWM timer 2 × ADCs - - - + + 36 2 × ADCs - - - + + DocID13587 Rev 17 13/117 + + 116 + Description STM32F103x8, STM32F103xB + +2.3 Overview + +2.3.1 ARM® Cortex®-M3 core with embedded Flash and SRAM + +2.3.2 The ARM® Cortex®-M3 processor is the latest generation of ARM processors for embedded +2.3.3 systems. It has been developed to provide a low-cost platform that meets the needs of MCU + implementation, with a reduced pin count and low-power consumption, while delivering +2.3.4 outstanding computational performance and an advanced system response to interrupts. +2.3.5 The ARM® Cortex®-M3 32-bit RISC processor features exceptional code-efficiency, + delivering the high-performance expected from an ARM core in the memory size usually + associated with 8- and 16-bit devices. + + The STM32F103xx performance line family having an embedded ARM core, is therefore + compatible with all ARM tools and software. + + Figure 1 shows the general block diagram of the device family. + + Embedded Flash memory + + 64 or 128 Kbytes of embedded Flash is available for storing programs and data. + + CRC (cyclic redundancy check) calculation unit + + The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit + data word and a fixed generator polynomial. + + Among other applications, CRC-based techniques are used to verify data transmission or + storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of + verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of + the software during runtime, to be compared with a reference signature generated at link- + time and stored at a given memory location. + + Embedded SRAM + + Twenty Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait + states. + + Nested vectored interrupt controller (NVIC) + + The STM32F103xx performance line embeds a nested vectored interrupt controller able to + handle up to 43 maskable interrupt channels (not including the 16 interrupt lines of Cortex®- + M3) and 16 priority levels. + • Closely coupled NVIC gives low-latency interrupt processing + • Interrupt entry vector table address passed directly to the core + • Closely coupled NVIC core interface + • Allows early processing of interrupts + • Processing of late arriving higher priority interrupts + • Support for tail-chaining + • Processor state automatically saved + • Interrupt entry restored on interrupt exit with no instruction overhead + +14/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Description + +2.3.6 This hardware block provides flexible interrupt management features with minimal interrupt +2.3.7 latency. +2.3.8 +2.3.9 External interrupt/event controller (EXTI) +2.3.10 + The external interrupt/event controller consists of 19 edge detector lines used to generate + interrupt/event requests. Each line can be independently configured to select the trigger + event (rising edge, falling edge, both) and can be masked independently. A pending register + maintains the status of the interrupt requests. The EXTI can detect an external line with a + pulse width shorter than the Internal APB2 clock period. Up to 80 GPIOs can be connected + to the 16 external interrupt lines. + + Clocks and startup + + System clock selection is performed on startup, however the internal RC 8 MHz oscillator is + selected as default CPU clock on reset. An external 4-16 MHz clock can be selected, in + which case it is monitored for failure. If failure is detected, the system automatically switches + back to the internal RC oscillator. A software interrupt is generated if enabled. Similarly, full + interrupt management of the PLL clock entry is available when necessary (for example on + failure of an indirectly used external crystal, resonator or oscillator). + + Several prescalers allow the configuration of the AHB frequency, the high-speed APB + (APB2) and the low-speed APB (APB1) domains. The maximum frequency of the AHB and + the high-speed APB domains is 72 MHz. The maximum allowed frequency of the low-speed + APB domain is 36 MHz. See Figure 2 for details on the clock tree. + + Boot modes + + At startup, boot pins are used to select one of three boot options: + • Boot from User Flash + • Boot from System Memory + • Boot from embedded SRAM + + The boot loader is located in System Memory. It is used to reprogram the Flash memory by + using USART1. For further details please refer to AN2606. + + Power supply schemes + + • VDD = 2.0 to 3.6 V: external power supply for I/Os and the internal regulator. + Provided externally through VDD pins. + + • VSSA, VDDA = 2.0 to 3.6 V: external analog power supplies for ADC, reset blocks, RCs + and PLL (minimum voltage to be applied to VDDA is 2.4 V when the ADC is used). + VDDA and VSSA must be connected to VDD and VSS, respectively. + + • VBAT = 1.8 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup + registers (through power switch) when VDD is not present. + + For more details on how to connect power pins, refer to Figure 14: Power supply scheme. + + Power supply supervisor + + The device has an integrated power-on reset (POR)/power-down reset (PDR) circuitry. It is + always active, and ensures proper operation starting from/down to 2 V. The device remains + + DocID13587 Rev 17 15/117 + + 116 + Description STM32F103x8, STM32F103xB + +2.3.11 in reset mode when VDD is below a specified threshold, VPOR/PDR, without the need for an +2.3.12 external reset circuit. + +Note: The device features an embedded programmable voltage detector (PVD) that monitors the + VDD/VDDA power supply and compares it to the VPVD threshold. An interrupt can be + generated when VDD/VDDA drops below the VPVD threshold and/or when VDD/VDDA is + higher than the VPVD threshold. The interrupt service routine can then generate a warning + message and/or put the MCU into a safe state. The PVD is enabled by software. + + Refer to Table 11: Embedded reset and power control block characteristics for the values of + VPOR/PDR and VPVD. + + Voltage regulator + + The regulator has three operation modes: main (MR), low-power (LPR) and power down. + • MR is used in the nominal regulation mode (Run) + • LPR is used in the Stop mode + • Power down is used in Standby mode: the regulator output is in high impedance: the + + kernel circuitry is powered down, inducing zero consumption (but the contents of the + registers and SRAM are lost) + + This regulator is always enabled after reset. It is disabled in Standby mode, providing high + impedance output. + + Low-power modes + + The STM32F103xx performance line supports three low-power modes to achieve the best + compromise between low-power consumption, short startup time and available wakeup + sources: + • Sleep mode + + In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can + wake up the CPU when an interrupt/event occurs. + • Stop mode + The Stop mode achieves the lowest power consumption while retaining the content of + SRAM and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC + and the HSE crystal oscillators are disabled. The voltage regulator can also be put + either in normal or in low-power mode. + The device can be woken up from Stop mode by any of the EXTI line. The EXTI line + source can be one of the 16 external lines, the PVD output, the RTC alarm or the USB + wakeup. + • Standby mode + The Standby mode is used to achieve the lowest power consumption. The internal + voltage regulator is switched off so that the entire 1.8 V domain is powered off. The + PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering + Standby mode, SRAM and register contents are lost except for registers in the Backup + domain and Standby circuitry. + The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a + rising edge on the WKUP pin, or an RTC alarm occurs. + + The RTC, the IWDG, and the corresponding clock sources are not stopped by entering Stop + or Standby mode. + +16/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Description + +2.3.13 DMA +2.3.14 +2.3.15 The flexible 7-channel general-purpose DMA is able to manage memory-to-memory, + peripheral-to-memory and memory-to-peripheral transfers. The DMA controller supports + circular buffer management avoiding the generation of interrupts when the controller + reaches the end of the buffer. + + Each channel is connected to dedicated hardware DMA requests, with support for software + trigger on each channel. Configuration is made by software and transfer sizes between + source and destination are independent. + + The DMA can be used with the main peripherals: SPI, I2C, USART, general-purpose and + advanced-control timers TIMx and ADC. + + RTC (real-time clock) and backup registers + + The RTC and the backup registers are supplied through a switch that takes power either on + VDD supply when present or through the VBAT pin. The backup registers are ten 16-bit + registers used to store 20 bytes of user application data when VDD power is not present. + + The real-time clock provides a set of continuously running counters which can be used with + suitable software to provide a clock calendar function, and provides an alarm interrupt and a + periodic interrupt. It is clocked by a 32.768 kHz external crystal, resonator or oscillator, the + internal low-power RC oscillator or the high-speed external clock divided by 128. The + internal low-power RC has a typical frequency of 40 kHz. The RTC can be calibrated using + an external 512 Hz output to compensate for any natural crystal deviation. The RTC + features a 32-bit programmable counter for long-term measurement using the Compare + register to generate an alarm. A 20-bit prescaler is used for the time base clock and is by + default configured to generate a time base of 1 second from a clock at 32.768 kHz. + + Timers and watchdogs + + The medium-density STM32F103xx performance line devices include an advanced-control + timer, three general-purpose timers, two watchdog timers and a SysTick timer. + + Table 4 compares the features of the advanced-control and general-purpose timers. + + Table 4. Timer feature comparison + + Timer Counter Counter Prescaler DMA request Capture/compare Complementary + resolution type factor + generation channels outputs + + Up, Any integer + + TIM1 16-bit down, between 1 Yes 4 Yes + + up/down and 65536 + + TIM2, Up, Any integer + + TIM3, 16-bit down, between 1 Yes 4 No + + TIM4 up/down and 65536 + + DocID13587 Rev 17 17/117 + + 116 + Description STM32F103x8, STM32F103xB + + Advanced-control timer (TIM1) + + The advanced-control timer (TIM1) can be seen as a three-phase PWM multiplexed on 6 + channels. It has complementary PWM outputs with programmable inserted dead-times. It + can also be seen as a complete general-purpose timer. The 4 independent channels can be + used for + • Input capture + • Output compare + • PWM generation (edge- or center-aligned modes) + • One-pulse mode output + + If configured as a general-purpose 16-bit timer, it has the same features as the TIMx timer. If + configured as the 16-bit PWM generator, it has full modulation capability (0-100%). + + In debug mode, the advanced-control timer counter can be frozen and the PWM outputs + disabled to turn off any power switch driven by these outputs. + + Many features are shared with those of the general-purpose TIM timers which have the + same architecture. The advanced-control timer can therefore work together with the TIM + timers via the Timer Link feature for synchronization or event chaining. + + General-purpose timers (TIMx) + + There are up to three synchronizable general-purpose timers embedded in the + STM32F103xx performance line devices. These timers are based on a 16-bit auto-reload + up/down counter, a 16-bit prescaler and feature 4 independent channels each for input + capture/output compare, PWM or one-pulse mode output. This gives up to 12 input + captures/output compares/PWMs on the largest packages. + The general-purpose timers can work together with the advanced-control timer via the Timer + Link feature for synchronization or event chaining. Their counter can be frozen in debug + mode. Any of the general-purpose timers can be used to generate PWM outputs. They all + have independent DMA request generation. + + These timers are capable of handling quadrature (incremental) encoder signals and the + digital outputs from 1 to 3 hall-effect sensors. + + Independent watchdog + + The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is + clocked from an independent 40 kHz internal RC and as it operates independently of the + main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog + to reset the device when a problem occurs, or as a free-running timer for application timeout + management. It is hardware- or software-configurable through the option bytes. The counter + can be frozen in debug mode. + + Window watchdog + + The window watchdog is based on a 7-bit downcounter that can be set as free-running. It + can be used as a watchdog to reset the device when a problem occurs. It is clocked from + the main clock. It has an early warning interrupt capability and the counter can be frozen in + debug mode. + +18/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Description + +2.3.16 SysTick timer +2.3.17 +2.3.18 This timer is dedicated for OS, but could also be used as a standard downcounter. It +2.3.19 features: +2.3.20 • A 24-bit downcounter + • Autoreload capability + • Maskable system interrupt generation when the counter reaches 0 + • Programmable clock source + + I²C bus + + Up to two I²C bus interfaces can operate in multimaster and slave modes. They can support + standard and fast modes. + + They support dual slave addressing (7-bit only) and both 7/10-bit addressing in master + mode. A hardware CRC generation/verification is embedded. + + They can be served by DMA and they support SM Bus 2.0/PM Bus. + + Universal synchronous/asynchronous receiver transmitter (USART) + + One of the USART interfaces is able to communicate at speeds of up to 4.5 Mbit/s. The + other available interfaces communicate at up to 2.25 Mbit/s. They provide hardware + management of the CTS and RTS signals, IrDA SIR ENDEC support, are ISO 7816 + compliant and have LIN Master/Slave capability. + + All USART interfaces can be served by the DMA controller. + + Serial peripheral interface (SPI) + + Up to two SPIs are able to communicate up to 18 Mbits/s in slave and master modes in full- + duplex and simplex communication modes. The 3-bit prescaler gives 8 master mode + frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC + generation/verification supports basic SD Card/MMC modes. + + Both SPIs can be served by the DMA controller. + + Controller area network (CAN) + + The CAN is compliant with specifications 2.0A and B (active) with a bit rate up to 1 Mbit/s. It + can receive and transmit standard frames with 11-bit identifiers as well as extended frames + with 29-bit identifiers. It has three transmit mailboxes, two receive FIFOs with 3 stages and + 14 scalable filter banks. + + Universal serial bus (USB) + + The STM32F103xx performance line embeds a USB device peripheral compatible with the + USB full-speed 12 Mbs. The USB interface implements a full-speed (12 Mbit/s) function + interface. It has software-configurable endpoint setting and suspend/resume support. The + dedicated 48 MHz clock is generated from the internal main PLL (the clock source must use + a HSE crystal oscillator). + + DocID13587 Rev 17 19/117 + + 116 + Description STM32F103x8, STM32F103xB + +2.3.21 GPIOs (general-purpose inputs/outputs) +2.3.22 + Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as +2.3.23 input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the +2.3.24 GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current- + capable. + + The I/Os alternate function configuration can be locked if needed following a specific + sequence in order to avoid spurious writing to the I/Os registers. + + I/Os on APB2 with up to 18 MHz toggling speed. + + ADC (analog-to-digital converter) + + Two 12-bit analog-to-digital converters are embedded into STM32F103xx performance line + devices and each ADC shares up to 16 external channels, performing conversions in single- + shot or scan modes. In scan mode, automatic conversion is performed on a selected group + of analog inputs. + + Additional logic functions embedded in the ADC interface allow: + • Simultaneous sample and hold + • Interleaved sample and hold + • Single shunt + + The ADC can be served by the DMA controller. + + An analog watchdog feature allows very precise monitoring of the converted voltage of one, + some or all selected channels. An interrupt is generated when the converted voltage is + outside the programmed thresholds. + + The events generated by the general-purpose timers (TIMx) and the advanced-control timer + (TIM1) can be internally connected to the ADC start trigger, injection trigger, and DMA + trigger respectively, to allow the application to synchronize A/D conversion and timers. + + Temperature sensor + + The temperature sensor has to generate a voltage that varies linearly with temperature. The + conversion range is between 2 V < VDDA < 3.6 V. The temperature sensor is internally + connected to the ADC12_IN16 input channel which is used to convert the sensor output + voltage into a digital value. + + Serial wire JTAG debug port (SWJ-DP) + + The ARM SWJ-DP Interface is embedded. and is a combined JTAG and serial wire debug + port that enables either a serial wire debug or a JTAG probe to be connected to the target. + The JTAG TMS and TCK pins are shared with SWDIO and SWCLK, respectively, and a + specific sequence on the TMS pin is used to switch between JTAG-DP and SW-DP. + +20/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Pinouts and pin description + +3 Pinouts and pin description + + Figure 3. STM32F103xx performance line LFBGA100 ballout + +           + + 3& 3& + + $ 26&B,1 7$03(5 3( 3% 3% 3% 3% 3$ 3$ 3$ + + 57& + + 3& 9%$7 + + % 26&B287 3( 3% 3% 3' 3' 3& 3& 3$ + + & 26&B,1 966B 3( 3( 3% 3' 3' 3& 3$ 3$ + + ' 26&B287 9''B 3( 3( %227 3' 3' 3' 3$ 3$ + + ( 1567 3& 3( 966B 966B 9 66B 966B 3' 3& 3& + + ) 3& 3& 3& 9''B 9''B 9''B 9''B 1& 3& 3& + + * 966$ 3$:.83 3$ 3& 3% 3( 3( 3% 3' 3' + + + 95()± 3$ 3$ 3& 3( 3( 3( 3% 3' 3' + + - 95() 3$ 3$ 3% 3( 3( 3% 3% 3' 3' + + . 9''$ 3$ 3$ 3% 3( 3( 3% 3% 3' 3' + + $,F + + DocID13587 Rev 17 21/117 + + 116 + Pinouts and pin description STM32F103x8, STM32F103xB + + Figure 4. STM32F103xx performance line LQFP100 pinout + +  6$$? +  633? +  0% +  0% +  0" +  0" +  "//4 +  0" +  0" +  0" +  0" +  0" +  0$ +  0$ +  0$ +  0$ +  0$ +  0$ +  0$ +  0$ +  0# +  0# +  0# +  0! +  0! + + 0%  ,1&0  6$$? + 0%   633? + 0%   .# + 0%   0! + 0%   0! + 6"!4   0! + 0# 4!-0%2 24#   0! + 0# /3#?).   0! + 0# /3#?/54   0! + 633?   0# + 6$$?   0# + /3#?).   0# + /3#?/54   0# + .234   0$ + 0#   0$ + 0#   0$ + 0#   0$ + 0#   0$ + 633!   0$ + 62%&   0$ + 62%&   0$ + 6$$!   0" + 0! 7+50   0" + 0!   0" + 0!   0" + + 0!  AI + 633?  + 6$$?  + + 0!  + 0!  + 0!  + 0!  + 0#  + 0#  + 0"  + 0"  + 0"  + 0%  + 0%  + 0%  + 0%  + 0%  + 0%  + 0%  + 0%  + 0%  + 0"  + 0"  + 633?  + 6$$?  + +22/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Pinouts and pin description + + Figure 5. STM32F103xx performance line UFBGA100 pinout + +            + +$ 3( 3( 3% %227 3' 3' 3% 3% 3$ 3$ 3$ 3$ + +% 3( 3( 3% 3% 3% 3' 3' 3' 3' 3& 3& 3$ + +& 3& 3( 3( 9''B 3% 3' 3' 3& 1& 3$ + + 57&B7$03(5 + +' 3& 3( 966B 3$ 3$ 3& + + 26&B,1 + +( 3& 9%$7 966B 3& 3& 3& + + 26&B287 + +) 26&B,1 966B 966B 966B + +* 26&B287 9''B 9''B 9''B + ++ 3& 1567 9''B 3' 3' 3' + +- 966$ 3& 3& 3' 3' 3' + +. 95() 3& 3$ 3$ 3& 3' 3' 3% 3% 3% + +/ 95() 3$ 3$ 3$ 3& 3% 3( 3( 3( 3% 3% 3% + + :.83 + +0 9''$ 3$ 3$ 3$ 3% 3% 3( 3( 3( 3( 3( 3( + + 069 + + DocID13587 Rev 17 23/117 + + 116 + Pinouts and pin description STM32F103x8, STM32F103xB + + Figure 6. STM32F103xx performance line LQFP64 pinout + + sͺϯ + s^^ͺϯ + W ϵ + W ϴ + KK d Ϭ + W ϳ + W ϲ + W ϱ + W ϰ + W ϯ + WϮ + WϭϮ + Wϭϭ + WϭϬ + W ϭϱ + W ϭϰ + + sd ϲϰ ϲϯ ϲϮ ϲϭ ϲϬ ϱϵ ϱϴ ϱϳ ϱϲ ϱϱ ϱϰ ϱϯ ϱϮ ϱϭ ϱϬ ϰϵ sͺϮ + ϰϴ s ^^ͺϮ + WϭϯͲdDWZͲZd ϭ W ϭϯ + W ϭϰͲK ^ ϯϮͺ/E W ϭϮ + Ϯ ϰϳ W ϭϭ + W ϭϱͲK ^ ϯϮͺKh d W ϭϬ + W  ϬͲK^ ͺ/E ϯ ϰϲ W ϵ + W ϴ + W  ϭͲK^ ͺKhd ϰ ϰϱ Wϵ + EZ^d Wϴ + WϬ ϱ ϰϰ Wϳ + Wϭ Wϲ + WϮ ϲ ϰϯ W ϭϱ + Wϯ W ϭϰ + s^^ ϳ ϰϮ W ϭϯ + s W ϭϮ + ϴ >Y&Wϲϰ ϰϭ + W ϬͲt< hW + W ϭ ϵ ϰϬ + W Ϯ + ϭϬ ϯϵ + + ϭϭ ϯϴ + + ϭϮ ϯϳ + + ϭϯ ϯϲ + + ϭϰ ϯϱ + + ϭϱ ϯϰ + + ϭϲ ϯϯ + + ϭϳ ϭϴ ϭϵ ϮϬ Ϯϭ ϮϮ Ϯϯ Ϯϰ Ϯϱ Ϯϲ Ϯϳ Ϯϴ Ϯϵ ϯϬ ϯϭ ϯϮ + + W ϯ + s ^^ͺϰ + sͺϰ + + W ϰ + W ϱ + W ϲ + W ϳ + Wϰ + Wϱ + W Ϭ + W ϭ + W Ϯ + Wϭ Ϭ + Wϭ ϭ + s ^^ͺϭ + sͺϭ + + DL + +24/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Pinouts and pin description + + Figure 7. STM32F103xx performance line TFBGA64 ballout + + ϭ Ϯ ϯ ϰ ϱ ϲ ϳ ϴ + + WϭϰͲ WϭϯͲ Wϵ + + K^ϯϮͺ/E dDWZͲZd Wϰ Wϯ Wϭϱ Wϭϰ Wϭϯ + Wϭϭ WϭϬ WϭϮ + WϭϱͲ s d Wϴ KKdϬ WϮ + K^ϯϮͺKhd + + K^ͺ/E s ^^ͺϰ Wϳ Wϱ WϭϮ WϭϬ Wϵ Wϭϭ + + K^ͺKhd s ͺϰ Wϲ s ^^ͺϯ s ^^ͺϮ s ^^ͺϭ Wϴ Wϵ + + EZ^d Wϭ WϬ s ͺϯ s ͺϮ s ͺϭ Wϳ Wϴ + +& s ^^ WϮ WϮ Wϱ WϬ Wϲ Wϭϱ Wϭϰ + +' s Z&н WϬͲtVVoDltDagwehcilehaarancetgearitsivtiecsinfjoerctthioenmisaixnidmuucmedablloywVeINd 8 MHz. + + Table 14. Maximum current consumption in Run mode, code with data processing + running from RAM + + Symbol Parameter Conditions fHCLK Max(1) Unit + TA = 85 °C TA = 105 °C + + 72 MHz 48 50 + + 48 MHz 31.5 32 + + External clock(2), all 36 MHz 24 25.5 + peripherals enabled 24 MHz + 17.5 18 + + 16 MHz 12.5 13 + 8 MHz + Supply 72 MHz 7.5 8 + 48 MHz + IDD current in 29 29.5 mA + + Run mode + + 20.5 21 + + External clock(2), all 36 MHz 16 16.5 + peripherals disabled 24 MHz + 11.5 12 + 16 MHz + 8.5 9 + 8 MHz + 5.5 6 + + 1. Based on characterization, tested in production at VDD max, fHCLK max. + 2. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. + +42/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + +Figure 16. Typical current consumption in Run mode versus frequency (at 3.6 V) - + code with data processing running from RAM, peripherals enabled + +Consumption (mA) 45 72 MHz + 40 36 MHz + 35 16 MHz + 30 8 MHz + 25 + 20 0 25 70 85 105 + 15 + 10 + + 5 + 0 + + -40 + + Temperature (°C) + +Figure 17. Typical current consumption in Run mode versus frequency (at 3.6 V) - + code with data processing running from RAM, peripherals disabled + + 30 + + 25 + +Consumption (mA) 20 + + 72 MHz + + 15 36 MHz + + 16 MHz + + 8 MHz + + 10 + + 5 + + 0 0 25 70 85 105 + -40 + + Temperature (°C) + + DocID13587 Rev 17 43/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Table 15. Maximum current consumption in Sleep mode, code running from Flash or + RAM + + Symbol Parameter Conditions fHCLK Max(1) Unit + TA = 85 °C TA = 105 °C + + 72 MHz 30 32 + + 48 MHz 20 20.5 + + External clock(2), all 36 MHz 15.5 16 + + peripherals enabled 24 MHz 11.5 12 + + 16 MHz 8.5 9 + + IDD Supply current in 8 MHz 5.5 6 + Sleep mode mA + 72 MHz 7.5 + 8 + + 48 MHz 6 6.5 + + External clock(2), all 36 MHz 5 5.5 + + peripherals disabled 24 MHz 4.5 5 + + 16 MHz 4 4.5 + + 8 MHz 3 4 + + 1. Based on characterization, tested in production at VDD max, fHCLK max with peripherals enabled. + 2. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. + +44/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + + Table 16. Typical and maximum current consumptions in Stop and Standby modes + + Typ(1) Max + +Symbol Parameter Conditions VDD/VBAT VDD/VBAT VDD/VBAT TA = TA = Unit + = 2.0 V = 2.4 V = 3.3 V 85 °C 105 °C + + Regulator in Run mode, low-speed + + and high-speed internal RC - 23.5 24 200 370 + oscillators and high-speed oscillator + 13.5 + Supply current OFF (no independent watchdog) 2.6 + 2.4 + in Stop mode Regulator in Low-power mode, low- 1.7 + 1.1 + speed and high-speed internal RC - 14 180 340 + oscillators and high-speed oscillator + +IDD OFF (no independent watchdog) + + Low-speed internal RC oscillator and - 3.4 - - µA + independent watchdog ON + + Supply current Low-speed internal RC oscillator - 3.2 - - + in Standby ON, independent watchdog OFF + + mode Low-speed internal RC oscillator and + + independent watchdog OFF, low- - 2 4 5 + + speed oscillator and RTC OFF + + Backup 1.4 1.9(2) 2.2 + +IDD_VBAT domain supply Low-speed oscillator and RTC ON 0.9 + + current + +1. Typical values are measured at TA = 25 °C. +2. Guaranteed based on test during characterization. + +Figure 18. Typical current consumption on VBAT with RTC on versus temperature at different + VBAT values + + 2.5 + + Consumption ( µA ) 2 2V + 1.5 2.4 V + 25 °C 70 °C 85 °C 105 °C 3V + 1 3.6 V + 0.5 + ai17351 + 0 + –40 °C + + Temperature (°C) + + DocID13587 Rev 17 45/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + +Figure 19. Typical current consumption in Stop mode with regulator in Run mode versus + temperature at VDD = 3.3 V and 3.6 V + + 300 + + 250 + +Consumption (µA) 200 + 3.3 V + + 150 + 3.6 V + + 100 + + 50 + + 0 + + -45 25 70 90 110 + + Temperature (°C) + +Figure 20. Typical current consumption in Stop mode with regulator in Low-power mode versus + temperature at VDD = 3.3 V and 3.6 V + + 300 + + 250 + + Consumption (µA) 200 + 3.3 V + + 150 + 3.6 V + + 100 + + 50 + + 0 0 25 70 85 105 + -40 + + Temperature (°C) + +46/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + +Figure 21. Typical current consumption in Standby mode versus temperature at + VDD = 3.3 V and 3.6 V + + 4.5 + + 4 + + 3.5 + +Consumption (µA) 3 + + 2.5 3.3 V + + 2 3.6 V + + 1.5 + + 1 + + 0.5 + + 0 25 °C 85 °C 105 °C + –45 °C + + Temperature (°C) + + Typical current consumption + + The MCU is placed under the following conditions: + • All I/O pins are in input mode with a static value at VDD or VSS (no load). + • All peripherals are disabled except if it is explicitly mentioned. + • The Flash access time is adjusted to fHCLK frequency (0 wait state from 0 to 24 MHz, 1 + + wait state from 24 to 48 MHz and 2 wait states above). + • Ambient temperature and VDD supply voltage conditions summarized in Table 9. + • Prefetch is ON (Reminder: this bit must be set before clock setting and bus prescaling) + • When the peripherals are enabled fPCLK1 = fHCLK/4, fPCLK2 = fHCLK/2, fADCCLK = + + fPCLK2/4 + + DocID13587 Rev 17 47/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Table 17. Typical current consumption in Run mode, code with data processing + running from Flash + + Typ(1) + + Symbol Parameter Conditions fHCLK All peripherals All peripherals Unit + + enabled(2) disabled + + 72 MHz 36 27 + + 48 MHz 24.2 18.6 + + 36 MHz 19 14.8 + + 24 MHz 12.9 10.1 + + 16 MHz 9.3 7.4 + + External clock(3) 8 MHz 5.5 4.6 mA + + 4 MHz 3.3 2.8 + + 2 MHz 2.2 1.9 + + 1 MHz 1.6 1.45 + + 500 kHz 1.3 1.25 + + Supply 125 kHz 1.08 1.06 + + IDD current in 64 MHz 31.4 23.9 + + Run mode + + 48 MHz 23.5 17.9 + + 36 MHz 18.3 14.1 + + Running on high 24 MHz 12.2 9.5 + + speed internal RC 16 MHz 8.5 6.8 + + (HSI), AHB 8 MHz 4.9 4 mA + prescaler used to + + reduce the 4 MHz 2.7 2.2 + + frequency 2 MHz 1.6 1.4 + + 1 MHz 1.02 0.9 + + 500 kHz 0.73 0.67 + + 125 kHz 0.5 0.48 + + 1. Typical values are measures at TA = 25 °C, VDD = 3.3 V. + 2. Add an additional power consumption of 0.8 mA per ADC for the analog part. In applications, this + + consumption occurs only while the ADC is on (ADON bit is set in the ADC_CR2 register). + 3. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. + +48/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + +Table 18. Typical current consumption in Sleep mode, code running from Flash or + RAM + + Typ(1) + +Symbol Parameter Conditions fHCLK All peripherals All peripherals Unit + + enabled(2) disabled + + 72 MHz 14.4 5.5 + 3.9 + 48 MHz 9.9 3.1 + 2.3 + 36 MHz 7.6 1.8 + 1.2 + 24 MHz 5.3 1.1 + 1 + 16 MHz 3.8 0.98 + 0.96 + External clock(3) 8 MHz 2.1 0.95 + + 4 MHz 1.6 mA + 4.4 + 2 MHz 1.3 3.3 + + 1 MHz 1.11 + + 500 kHz 1.04 + + Supply 125 kHz 0.98 + +IDD current in 64 MHz 12.3 + + Sleep mode + + 48 MHz 9.3 + + 36 MHz 7 2.5 + + 24 MHz 4.8 1.8 + + Running on high 16 MHz 3.2 1.2 + speed internal RC + + (HSI), AHB prescaler 8 MHz 1.6 0.6 + + used to reduce the 4 MHz 1 0.5 + frequency + + 2 MHz 0.72 0.47 + + 1 MHz 0.56 0.44 + + 500 kHz 0.49 0.42 + + 125 kHz 0.43 0.41 + +1. Typical values are measures at TA = 25 °C, VDD = 3.3 V. +2. Add an additional power consumption of 0.8 mA per ADC for the analog part. In applications, this + + consumption occurs only while the ADC is on (ADON bit is set in the ADC_CR2 register). +3. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. + + DocID13587 Rev 17 49/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + On-chip peripheral current consumption + + The current consumption of the on-chip peripherals is given in Table 19. The MCU is placed + under the following conditions: + • all I/O pins are in input mode with a static value at VDD or VSS (no load) + • all peripherals are disabled unless otherwise mentioned + • the given value is calculated by measuring the current consumption + + – with all peripherals clocked off + – with only one peripheral clocked on + • ambient operating temperature and VDD supply voltage conditions summarized in + Table 6 + + Table 19. Peripheral current consumption + + Peripherals µA/MHz + + AHB (up to 72 MHz) DMA1 16.53 + APB1 (up to 36 MHz) BusMatrix(1) 8.33 + APB1-Bridge 10.28 + 32.50 + TIM2 31.39 + TIM3 31.94 + TIM4 4.17 + SPI2 12.22 + USART2 12.22 + USART3 10.00 + I2C1 10.00 + I2C2 17.78 + USB 18.06 + CAN1 2.50 + WWDG 1.67 + PWR 2.50 + BKP 11.67 + IWDG + +50/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + + Table 19. Peripheral current consumption (continued) + + Peripherals µA/MHz + + APB2 (up to 72 MHz) APB2-Bridge 3.75 + GPIOA 6.67 + GPIOB 6.53 + GPIOC 6.53 + GPIOD 6.53 + GPIOE 6.39 + SPI1 4.72 + USART1 11.94 + TIM1 23.33 + ADC1(2) 17.50 + ADC2(2) 16.07 + + 1. The BusMatrix is automatically active when at least one master peripheral is ON (CPU or DMA). + + 2. Specific conditions for measuring ADC current consumption: rfeHgCiLsKte=r i5s6seMtHtoz,1f,AaPBc1u=rrefHnCt LcKo/n2s,ufAmPpBt2io=n + afHnCaLlKo,gfApDaCrtCeLqKu=alfAtoPB02.6/45, When ADON bit in the ADCx_CR2 of + mA must be added for each ADC. + +5.3.6 External clock source characteristics + + High-speed external user clock generated from an external source + + The characteristics given in Table 20 result from tests performed using an high-speed + external clock source, and under ambient temperature and supply voltage conditions + summarized in Table 9. + + Table 20. High-speed external user clock characteristics + + Symbol Parameter Conditions Min Typ Max Unit + + fHSE_ext User external clock source 1 8 25 MHz + frequency(1) + + VHSEH OSC_IN input pin high level voltage 0.7VDD - VDD V + + VHSEL OSC_IN input pin low level voltage - VSS - 0.3VDD + + tw(HSE) OSC_IN high or low time(1) 5 - - + tw(HSE) OSC_IN rise or fall time(1) + tr(HSE) ns + tf(HSE) + - - 20 + + Cin(HSE) OSC_IN input capacitance(1) - - 5 - pF + + DuCy(HSE) Duty cycle - 45 - 55 % + + IL OSC_IN Input leakage current VSS ≤VIN ≤VDD - - ±1 µA + + 1. Guaranteed by design. + + DocID13587 Rev 17 51/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Low-speed external user clock generated from an external source + + The characteristics given in Table 21 result from tests performed using an low-speed + external clock source, and under ambient temperature and supply voltage conditions + summarized in Table 9. + + Table 21. Low-speed external user clock characteristics + + Symbol Parameter Conditions Min Typ Max Unit + + fLSE_ext User External clock source 32.768 1000 kHz + frequency(1) + + VLSEH OSC32_IN input pin high level 0.7VDD - VDD + VLSEL voltage V + + OSC32_IN input pin low level - VSS - 0.3VDD + voltage + + tw(LSE) OSC32_IN high or low time(1) 450 - - + tw(LSE) ns + + tr(LSE) OSC32_IN rise or fall time(1) - - 50 + tf(LSE) + + Cin(LSE) OSC32_IN input capacitance(1) - - 5 - pF + + DuCy(LSE) Duty cycle - 30 - 70 % + + IL OSC32_IN Input leakage VSS ≤VIN ≤VDD - - ±1 µA + current + + 1. Guaranteed by design. + + Figure 22. High-speed external clock source AC timing diagram + + 9+6(+  + 9+6(/  + + WU +6( WI +6( W: +6( W: +6( W + 7+6( + + (;7(5 1$/ I+6(BH[W ,/ + 670)[[ + &/2&. 6285& ( 26& B,1 + + DL + +52/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + + Figure 23. Low-speed external clock source AC timing diagram + + 9/6(+  + 9/6(/  + + WU /6( WI /6( W: /6( W: /6( W + 7/6( + + (;7(5 1$/ I/6(BH[W 26&B,1 ,/ + &/2&. 6285& ( 670)[[ + + DLE + +High-speed external clock generated from a crystal/ceramic resonator + +The high-speed external (HSE) clock can be supplied with a 4 to 16 MHz crystal/ceramic +resonator oscillator. All the information given in this paragraph are based on +characterization results obtained with typical external components specified in Table 22. In +the application, the resonator and the load capacitors have to be placed as close as +possible to the oscillator pins in order to minimize output distortion and startup stabilization +time. Refer to the crystal resonator manufacturer for more details on the resonator +characteristics (frequency, package, accuracy). + + Table 22. HSE 4-16 MHz oscillator characteristics(1) (2) + + Symbol Parameter Conditions Min Typ Max Unit + + fOSC_IN Oscillator frequency - 4 8 16 MHz + + RF Feedback resistor - - 200 - kΩ + + Recommended load capacitance + + C versus equivalent serial RS = 30 Ω - 30 - pF + resistance of the crystal (RS)(3) + + i2 HSE driving current VDD = 3.3 V, VIN = VSS - - 1 mA + with 30 pF load + + gm Oscillator transconductance Startup 25 - - mA/V +tSU(HSE(4) startup time + VDD is stabilized - 2 - ms + +1. Resonator characteristics given by the crystal/ceramic resonator manufacturer. + +2. Guaranteed based on test during characterization. + +3. The relatively low value of the RF resistor offers a good protection against issues resulting from use in a + humid environment, due to the induced leakage and the bias condition change. However, it is + recommended to take this point into account if the MCU is used in tough humidity conditions. + +4. otSsUc(iHllaSEtio) nis the startup time measured from the moment it is enabled (by software) to a stabilized 8 MHz + is reached. This value is measured for a standard crystal resonator and it can vary significantly + with the crystal manufacturer + + DocID13587 Rev 17 53/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + For CL1 and CL2, it is recommended to use high-quality external ceramic capacitors in the + 5 pF to 25 pF range (typ.), designed for high-frequency applications, and selected to match + the requirements of the crystal or resonator (see Figure 24). CL1 and CL2 are usually the + same size. The crystal manufacturer typically specifies a load capacitance which is the + series combination of CL1 and CL2. PCB and MCU pin capacitance must be included (10 pF + can be used as a rough estimate of the combined pin and board capacitance) when sizing + CL1 and CL2. Refer to the application note AN2867 “Oscillator design guide for ST + microcontrollers” available from the ST website www.st.com. + + Figure 24. Typical application with an 8 MHz crystal + + 5HVRQDWRUZLWK 26&B,1 I+6 ( + LQWHJUDWHGFDSDFLWRUV 5) + %LDV + &/ FRQWUROOHG + + 0+ ] JDLQ + UHVRQDWRU + + 5(;7   26&B28 7 670)[[ + + &/ + + DL + + 1. REXT value depends on the crystal characteristics. + + Low-speed external clock generated from a crystal/ceramic resonator + + The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal/ceramic + resonator oscillator. All the information given in this paragraph are based on + characterization results obtained with typical external components specified in Table 23. In + the application, the resonator and the load capacitors have to be placed as close as + possible to the oscillator pins in order to minimize output distortion and startup stabilization + time. Refer to the crystal resonator manufacturer for more details on the resonator + characteristics (frequency, package, accuracy). + + Table 23. LSE oscillator characteristics (fLSE = 32.768 kHz)(1) (2) + +Symbol Parameter Conditions - Min Typ Max Unit + +RF Feedback resistor - - - 5 - MΩ + + Recommended load capacitance + +C versus equivalent serial RS = 30 KΩ - - - 15 pF + + resistance of the crystal (RS) + +I2 LSE driving current VDD = 3.3 V - - - 1.4 µA + VIN = VSS + +gm Oscillator transconductance - - 5 - - µA/V + +54/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + + Table 23. LSE oscillator characteristics (fLSE = 32.768 kHz)(1) (2) (continued) + + Symbol Parameter Conditions - Min Typ Max Unit + + TA = 50 °C - 1.5 - + + TA = 25 °C - 2.5 - + + TA = 10 °C - 4 - + + tSU(LSE)(3) Startup time VDD is TA = 0 °C - 6 - s + stabilized TA = -10 °C + - 10 - + + TA = -20 °C - 17 - + + TA = -30 °C - 32 - + + TA = -40 °C - 60 - + +1. Guaranteed based on test during characterization. + +2. Refer to the note and caution paragraphs below the table, and to the application note AN2867 “Oscillator design guide for + ST microcontrollers”. + +3. rteSaUc(LhSeEd). is the startup time measured from the moment it is enabled (by software) to a stabilized 32.768 kHz oscillation is + This value is measured for a standard crystal and it can vary significantly with the crystal manufacturer + +Note: For CL1 and CL2 it is recommended to use high-quality ceramic capacitors in the 5 pF to +Caution: 15 pF range selected to match the requirements of the crystal or resonator. CL1 and CL2, are + usually the same size. The crystal manufacturer typically specifies a load capacitance which + is the series combination of CL1 and CL2. + Load capacitance CL has the following formula: CL = CL1 x CL2 / (CL1 + CL2) + Cstray where + Cstray is the pin capacitance and board or trace PCB-related capacitance. Typically, it is + between 2 pF and 7 pF. + + To avoid exceeding the maximum value of CL1 and CL2 (15 pF) it is strongly recommended + to use a resonator with a load capacitance CL ≤ 7 pF. Never use a resonator with a load + capacitance of 12.5 pF. + Example: if you choose a resonator with a load capacitance of CL = 6 pF, and Cstray = 2 pF, + then CL1 = CL2 = 8 pF. + + Figure 25. Typical application with a 32.768 kHz crystal + + 5HVRQDWRUZLWK 26&B,1 %LDV I/6( + LQWHJUDWHGFDSDFLWRUV 5) FRQWUROOHG 670)[[ + + &/ 26&B28 7 JDLQ + + N+ ] + UHVRQDWRU + + &/ + + DL + +5.3.7 Internal clock source characteristics + + The parameters given in Table 24 are derived from tests performed under ambient + temperature and VDD supply voltage conditions summarized in Table 9. + + DocID13587 Rev 17 55/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + High-speed internal (HSI) RC oscillator + + Table 24. HSI oscillator characteristics(1) + + Symbol Parameter Conditions Min Typ Max Unit + + fHSI Frequency - - 8 - MHz + + DuCy(HSI) Duty cycle - 45 - 55 + + User-trimmed with the RCC_CR - - 1(3) + register(2) + + ACCHSI Accuracy of the HSI Factory- TA = –40 to 105 °C –2 - 2.5 % + TA = –10 to 85 °C –1.5 - 2.2 + oscillator calibrated 2 + 1.8 + (4)(5) TA = 0 to 70 °C –1.3 - + + TA = 25 °C –1.1 - + + tsu(HSI)(4) HSI oscillator - 1 - 2 µs + startup time + + IDD(HSI)(4) HSI oscillator power - - 80 100 µA + consumption + + 1. VDD = 3.3 V, TA = –40 to 105 °C unless otherwise specified. + 2. Refer to application note AN2868 “STM32F10xxx internal RC oscillator (HSI) calibration” available from + + the ST website www.st.com. + 3. Guaranteed by design. + 4. Guaranteed based on test during characterization. + 5. The actual frequency of HSI oscillator may be impacted by a reflow, but does not drift out of the specified + + range. + + Low-speed internal (LSI) RC oscillator + + Table 25. LSI oscillator characteristics (1) + + Symbol Parameter Min Typ Max Unit + + fLSI(2) Frequency 30 40 60 kHz + tsu(LSI)(3) LSI oscillator startup time + IDD(LSI)(3) LSI oscillator power consumption - - 85 µs + + - 0.65 1.2 µA + + 1. VDD = 3 V, TA = –40 to 105 °C unless otherwise specified. + 2. Guaranteed based on test during characterization. + + 3. Guaranteed by design. + + Wakeup time from low-power mode + + The wakeup times given in Table 26 is measured on a wakeup phase with a 8-MHz HSI RC + oscillator. The clock source used to wake up the device depends from the current operating + mode: + • Stop or Standby mode: the clock source is the RC oscillator + • Sleep mode: the clock source is the clock that was set before entering Sleep mode. + + All timings are derived from tests performed under ambient temperature and VDD supply + voltage conditions summarized in Table 9. + +56/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + + Table 26. Low-power mode wakeup timings + + Symbol Parameter Typ Unit + + tWUSLEEP(1) Wakeup from Sleep mode 1.8 + + tWUSTOP(1) Wakeup from Stop mode (regulator in run mode) 3.6 + µs + Wakeup from Stop mode (regulator in low-power + mode) 5.4 + + tWUSTDBY(1) Wakeup from Standby mode 50 + + 1. The wakeup times are measured from the wakeup event to the point in which the user application code + reads the first instruction. + +5.3.8 PLL characteristics +5.3.9 + The parameters given in Table 27 are derived from tests performed under ambient + temperature and VDD supply voltage conditions summarized in Table 9. + + Table 27. PLL characteristics + + Symbol Parameter Min(1) Value Max(1) Unit + Typ + + fPLL_IN PLL input clock(2) 1 8.0 25 MHz + PLL input clock duty cycle + 40 - 60 % + + fPLL_OUT PLL multiplier output clock 16 - 72 MHz + tLOCK PLL lock time + Jitter Cycle-to-cycle jitter - - 200 µs + + - - 300 ps + + 1. Guaranteed based on test during characterization. + 2. Take care of using the appropriate multiplier factors so as to have PLL input clock values compatible with + + the range defined by fPLL_OUT. + + Memory characteristics + + Flash memory + + The characteristics are given at TA = –40 to 105 °C unless otherwise specified. + + Table 28. Flash memory characteristics + + Symbol Parameter Conditions Min(1) Typ Max(1) Unit + + tprog 16-bit programming time TA = –40 to +105 °C 40 52.5 70 µs + tERASE Page (1 KB) erase time TA = –40 to +105 °C + Mass erase time TA = –40 to +105 °C 20 - 40 ms + tME + 20 - 40 + + DocID13587 Rev 17 57/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Table 28. Flash memory characteristics (continued) + + Symbol Parameter Conditions Min(1) Typ Max(1) Unit + + Read mode + + fHCLK = 72 MHz with 2 wait - - 20 + + states, VDD = 3.3 V mA + + IDD Supply current Write / Erase modes - - 5 + fHCLK = 72 MHz, VDD = 3.3 V + Vprog Programming voltage + Power-down mode / Halt, - - 50 µA + 1. Guaranteed by design. VDD = 3.0 to 3.6 V + + - 2 - 3.6 V + + Table 29. Flash memory endurance and data retention + + Symbol Parameter Conditions Value Unit + Min(1) Typ Max + + NEND Endurance TA = –40 to +85 °C (6 suffix versions) 10 - - kcycles + TA = –40 to +105 °C (7 suffix versions) + - + 1 kcycle(2) at TA = 85 °C 30 - - Years + - + tRET Data retention 1 kcycle(2) at TA = 105 °C 10 - + + 10 kcycles(2) at TA = 55 °C 20 - + + 1. Guaranteed based on test during characterization. + + 2. Cycling performed over the whole temperature range. + +5.3.10 EMC characteristics + + Susceptibility tests are performed on a sample basis during device characterization. + + Functional EMS (electromagnetic susceptibility) + + While a simple application is executed on the device (toggling 2 LEDs through I/O ports). + the device is stressed by two electromagnetic events until a failure occurs. The failure is + indicated by the LEDs: + • Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until + + a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard. + • FTB: A Burst of Fast Transient voltage (positive and negative) is applied to VDD and + + VSS through a 100 pF capacitor, until a functional disturbance occurs. This test is + compliant with the IEC 61000-4-4 standard. + + A device reset allows normal operations to be resumed. + + The test results are given in Table 30. They are based on the EMS levels and classes + defined in application note AN1709. + +58/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + + Table 30. EMS characteristics + +Symbol Parameter Conditions Level/ + Class +VFESD Voltage limits to be applied on any I/O pin to VDD = 3.3 V, TA = +25 °C, +VEFTB induce a functional disturbance fHCLK = 72 MHz 2B + conforms to IEC 61000-4-2 + 4A + Fast transient voltage burst limits to be VDD = 3.3 V, TA = +25 °C, + applied through 100 pF on VDD and VSS fHCLK = 72 MHz + pins to induce a functional disturbance conforms to IEC 61000-4-4 + +Designing hardened software to avoid noise problems + +EMC characterization and optimization are performed at component level with a typical +application environment and simplified MCU software. It should be noted that good EMC +performance is highly dependent on the user application and the software in particular. + +Therefore it is recommended that the user applies EMC software optimization and +prequalification tests in relation with the EMC level requested for his application. + +Software recommendations + +The software flowchart must include the management of runaway conditions such as: +• Corrupted program counter +• Unexpected reset +• Critical Data corruption (control registers...) + +Prequalification trials + +Most of the common failures (unexpected reset and program counter corruption) can be +reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1 +second. + +To complete these trials, ESD stress can be applied directly on the device, over the range of +specification values. When unexpected behavior is detected, the software can be hardened +to prevent unrecoverable errors occurring (see application note AN1015). + +Electromagnetic Interference (EMI) + +The electromagnetic field emitted by the device are monitored while a simple application is +executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with +IEC 61967-2 standard which specifies the test board and the pin loading. + + Table 31. EMI characteristics + +Symbol Parameter Conditions Monitored Max vs. [fHSE/fHCLK] Unit + frequency band 8/48 MHz 8/72 MHz + + VDD = 3.3 V, TA = 25 °C, 0.1 to 30 MHz 12 12 + LQFP100 package +SEMI Peak level compliant with 30 to 130 MHz 22 19 dBµV + 130 MHz to 1GHz 23 + IEC 61967-2 29 + + SAE EMI Level 4 4 - + + DocID13587 Rev 17 59/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + +5.3.11 Absolute maximum ratings (electrical sensitivity) + + Based on three different tests (ESD, LU) using specific measurement methods, the device is + stressed in order to determine its performance in terms of electrical sensitivity. + + Electrostatic discharge (ESD) + + Electrostatic discharges (a positive then a negative pulse separated by 1 second) are + applied to the pins of each sample according to each pin combination. The sample size + depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test + conforms to the JESD22-A114/C101 standard. + + Table 32. ESD absolute maximum ratings + + Symbol Ratings Conditions Class Maximum value(1) Unit + + VESD(HBM) Electrostatic discharge TA = +25 °C 2 2000 + voltage (human body model) conforming to V + JESD22-A114 + 500 + Electrostatic discharge TA = +25 °C II + VESD(CDM) voltage (charge device conforming to + + model) ANSI/ESD STM5.3.1 + + 1. Guaranteed based on test during characterization + + Static latch-up + + Two complementary static tests are required on six parts to assess the latch-up + performance: + • A supply overvoltage is applied to each power supply pin + • A current injection is applied to each input, output and configurable I/O pin + + These tests are compliant with EIA/JESD 78A IC latch-up standard. + + Table 33. Electrical sensitivities + + Symbol Parameter Conditions Class + II level A + LU Static latch-up class TA = +105 °C conforming to JESD78A + +60/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + +5.3.12 I/O current injection characteristics + + As a general rule, current injection to the I/O pins, due to external voltage below VSS or + above VDD (for standard, 3 V-capable I/O pins) should be avoided during normal product + operation. However, in order to give an indication of the robustness of the microcontroller in + cases when abnormal injection accidentally happens, susceptibility tests are performed on a + sample basis during device characterization. + + Functional susceptibilty to I/O current injection + + While a simple application is executed on the device, the device is stressed by injecting + current into the I/O pins programmed in floating input mode. While current is injected into + the I/O pin, one at a time, the device is checked for functional failures. + + The failure is indicated by an out of range parameter: ADC error above a certain limit (>5 + LSB TUE), out of spec current injection on adjacent pins or other functional failure (for + example reset, oscillator frequency deviation). + + The test results are given in Table 34 + + Table 34. I/O current injection susceptibility + + Functional susceptibility + + Symbol Description Negative Positive Unit + + injection injection + + Injected current on OSC_IN32, -0 +0 + + OSC_OUT32, PA4, PA5, PC13 + + IINJ Injected current on all FT pins -5 +0 mA + + Injected current on any other pin -5 +5 + + DocID13587 Rev 17 61/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + +5.3.13 I/O port characteristics + + General input/output characteristics + + Unless otherwise specified, the parameters given in Table 35 are derived from tests + performed under the conditions summarized in Table 9. All I/Os are CMOS and TTL + compliant. + + Table 35. I/O static characteristics + +Symbol Parameter Conditions Min Typ Max Unit + + Standard IO - 0.28*(VDD-2 V)+0.8 V(1) + - 0.32*(VDD-2V)+0.75 V(1) + input low level - + + voltage + + VIL Low level input voltage IO FT(3) input - + low level voltage + + All I/Os except - - 0.35VDD(2) + BOOT0 + + Standard IO V + + input high level 0.41*(VDD-2 V)+1.3 V(1) - - + + voltage + + VIH High level input IO FT(3) input 0.42*(VDD-2 V)+1 V(1) - - + voltage high level + + voltage + + All I/Os except 0.65VDD(2) - - + BOOT0 + + Standard IO Schmitt + + trigger voltage - 200 - - + Vhys hysteresis(4) mV + + IO FT Schmitt trigger - 5% VDD(5) - - + voltage hysteresis(4) + + VSS ≤ VIN ≤ VDD - - ±1 + Standard I/Os - - µA + Ilkg Input leakage current VIN = 5 V + 3 + (6) + + I/O FT + + RPU Weak pull-up VIN = VSS 30 40 50 + equivalent resistor(7) VIN = VDD + kΩ + Weak pull-down + RPD equivalent resistor(7) 30 40 50 + + CIO I/O pin capacitance - 5 - pF + +1. Data based on design simulation. + +2. Tested in production. + +3. FT = Five-volt tolerant. In order to sustain a voltage higher than VDD+0.3 the internal pull-up/pull-down resistors must be + disabled. + +4. Hysteresis voltage between Schmitt trigger switching levels. Guaranteed based on test during characterization. + +5. With a minimum of 100 mV. + +6. Leakage could be higher than max. if negative current is injected on adjacent pins. + +62/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + +7. Pull-up and pull-down resistors are designed with ma itnriumeumres(~is1ta0n%ceoridnesre).ries with a switchable PMOS/NMOS. This + PMOS/NMOS contribution to the series resistance is + + All I/Os are CMOS and TTL compliant (no software configuration required). Their + characteristics cover more than the strict CMOS-technology or TTL parameters. The + coverage of these requirements is shown in Figure 26 and Figure 27 for standard I/Os, and + in Figure 28 and Figure 29 for 5 V tolerant I/Os. + + Figure 26. Standard I/O input characteristics - CMOS port + + 6)(6),6 !REANOT + + DETERMINED + + #-/3STANDARDREQUIREMENT6 )(6$$ 6"A)(SEDON6DE$S$IG NS IMULATIONS + 6")A,SEDON6D$E$SI GN SIMULATIONS +   + + 4ESTEDINPRODUCTION  + 4ESTEDINPRODUCTION + 7)(MIN      +  + 7),MAX  #-/3STANDARDREQUIREMENT6 ),6$$ + +  + +      6$$6 + + AIC + + Figure 27. Standard I/O input characteristics - TTL port + + 6)(6),6 !REANOT + DETERMINED + 7)(MIN  44,REQUIREMENTS 6)( 6 +  "6A)S(EDOND6E$SI$GN S IMULATIONS +   "6A),SEDOND6E$S$IG NS IMULATIONS + + 7),MAX  + + 44,REQUIREMENTS 6),6 + +    6$$6 + + AIB + + DocID13587 Rev 17 63/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Figure 28. 5 V tolerant I/O input characteristics - CMOS port + +6)(6),6 !REANOT + + DETERMINED + + #-/3STANDARDREQUIREMENTS6 )(6 $$ "6"6A)A)(,SSEEDDOONND66DEE$$SS$$IIGG NNSS IIMMUULLAATTIIOONNSS + + 4ESTEDINPRODUCTION   + +    +  +   ), 6$$ +  #-/3STANDARDREQUIRMENT6 + +  + 4ESTEDINPRODUCTION + +      6$$6 + + 6$$ + + AIC + + Figure 29. 5 V tolerant I/O input characteristics - TTL port + + 6)(6),6 !REANOT + DETERMINED +  + 44,REQUIREMENT6)(6 ""66AA))(SS,EEDDOONN + +DD6EE6SS$$IIGG$$NN SSII MMUULLAATTIIOONNSS + +  +  + +7)(MIN 44,REQUIREMENTS6),6 +7),MAX  + +  + +    6$$6 + + AIB + +64/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + +Output driving current + +The GPIOs (general-purpose inputs/outputs) can sink or source up to ±8 mA, and sink or +source up to ±20 mA (with a relaxed VOL/VOH) except PC13, PC14 and PC15 which can +sink or source up to +/-3mA. When using the GPIOs PC13 to PC15 in output mode, the +speed should not exceed 2 MHz with a maximum load of 30 pF. + +In the user application, the number of I/O pins which can drive current must be limited to +respect the absolute maximum rating specified in Section 5.2: +• The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run + + consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating + IVDD (see Table 7). +• The sum of the currents sunk by all the I/Os on VSS plus the maximum Run + consumption of the MCU sunk on VSS cannot exceed the absolute maximum rating + IVSS (see Table 7). + +Output voltage levels + +Unless otherwise specified, the parameters given in Table 36 are derived from tests +performed under ambient temperature and VDD supply voltage conditions summarized in +Table 9. All I/Os are CMOS and TTL compliant. + + Table 36. Output voltage characteristics + +Symbol Parameter Conditions Min Max Unit + + VOL(1) Output low level voltage for an I/O pin CMOS port(2), - 0.4 + when 8 pins are sunk at same time + IIO = +8 mA + VOH(3) Output high level voltage for an I/O pin 2.7 V < VDD < 3.6 V VDD–0.4 - + when 8 pins are sourced at same time + + VOL (1) Output low level voltage for an I/O pin TTL port(2) - 0.4 + when 8 pins are sunk at same time + IIO =+ 8mA - + VOH (3) Output high level voltage for an I/O pin 2.7 V < VDD < 3.6 V 2.4 V + when 8 pins are sourced at same time + 1.3 +VOL(1)(4) Output low level voltage for an I/O pin IIO = +20 mA - + when 8 pins are sunk at same time + +VOH(3)(4) Output high level voltage for an I/O pin 2.7 V < VDD < 3.6 V VDD–1.3 - + when 8 pins are sourced at same time + +VOL(1)(4) Output low level voltage for an I/O pin IIO = +6 mA - 0.4 + when 8 pins are sunk at same time + +VOH(3)(4) Output high level voltage for an I/O pin 2 V < VDD < 2.7 V VDD–0.4 - + when 8 pins are sourced at same time + +1. The tIhIOe current sunk by the device must always respect the absolute maximum rating specified in Table 7 + and sum of IIO (I/O ports and control pins) must not exceed IVSS. + +2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52. + +3. TTahbeleIIO7 current sourced by the device must always respect the absolute maximum rating specified in + and the sum of IIO (I/O ports and control pins) must not exceed IVDD. + +4. Guaranteed based on test during characterization. + + DocID13587 Rev 17 65/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Input/output AC characteristics + + The definition and values of input/output AC characteristics are given in Figure 30 and + Table 37, respectively. + + Unless otherwise specified, the parameters given in Table 37 are derived from tests + performed under the ambient temperature and VDD supply voltage conditions summarized + in Table 9. + + Table 37. I/O AC characteristics(1) + + MODEx[1:0] Symbol Parameter Conditions Min Max Unit + bit value(1) + + fmax(IO)out Maximum frequency(2) CL = 50 pF, VDD = 2 V to 3.6 V - 2 MHz + + 10 tf(IO)out Output high to low - 125(3) + level fall time + CL = 50 pF, VDD = 2 V to 3.6 V ns + Output low to high - 125(3) + tr(IO)out level rise time + + fmax(IO)out Maximum frequency(2) CL = 50 pF, VDD = 2 V to 3.6 V - 10 MHz + + 01 tf(IO)out Output high to low - 25(3) + level fall time + CL = 50 pF, VDD = 2 V to 3.6 V ns + Output low to high - 25(3) + tr(IO)out level rise time + + CL = 30 pF, VDD = 2.7 V to 3.6 V - 50 + Fmax(IO)out Maximum frequency(2) CL = 50 pF, VDD = 2.7 V to 3.6 V - 30 MHz + + CL = 50 pF, VDD = 2 V to 2.7 V - 20 + + Output high to low CL = 30 pF, VDD = 2.7 V to 3.6 V - 5(3) + level fall time + 11 tf(IO)out CL = 50 pF, VDD = 2.7 V to 3.6 V - 8(3) + + CL = 50 pF, VDD = 2 V to 2.7 V - 12(3) ns + CL = 30 pF, VDD = 2.7 V to 3.6 V - 5(3) + + tr(IO)out Output low to high CL = 50 pF, VDD = 2.7 V to 3.6 V - 8(3) + level rise time + CL = 50 pF, VDD = 2 V to 2.7 V - 12(3) + + Pulse width of external + + - tEXTIpw signals detected by - 10 - ns + + the EXTI controller + + 1. The I/O speed is configured using the MODEx[1:0] bits. Refer to the STM32F10xxx reference manual for a + description of GPIO Port configuration register. + + 2. The maximum frequency is defined in Figure 30. + 3. Guaranteed by design. + +66/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + + Figure 30. I/O AC characteristics definition + +   + +   +   + + %84%2.!, TR)/ OUT TF)/ OUT + /54054 4 + /.P& + + -AXIMUMFREQUENCYISACHIEVEDIFTR TF ” 4ANDIFTHEDUTYCYCLEIS  AIC + + WHENLOADEDBYP& + + +5.3.14 NRST pin characteristics + + The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up + resistor, RPU (see Table 35). + + Unless otherwise specified, the parameters given in Table 38 are derived from tests + performed under the ambient temperature and VDD supply voltage conditions summarized + in Table 9. + + Table 38. NRST pin characteristics + + Symbol Parameter Conditions Min Typ Max Unit + + VIL(NRST)(1) NRST Input low level voltage - –0.5 - 0.8 V + VIH(NRST)(1) NRST Input high level voltage + - 2 - VDD+0.5 + + Vhys(NRST) NRST Schmitt trigger voltage - - 200 - mV + hysteresis + + RPU Weak pull-up equivalent resistor(2) VIN = VSS 30 40 50 kΩ + + VF(NRST)(1) NRST Input filtered pulse - - - 100 ns + + VNF(NRST)(1) NRST Input not filtered pulse - 300 - - ns + + 1. Guaranteed by design. + + 2. The pull-up is designed with ma intriumeumre(s~is1t0a%nceoridnesre).ries with a switchable PMOS. This PMOS contribution + + to the series resistance must be + + DocID13587 Rev 17 67/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + Figure 31. Recommended NRST pin protection + + %XTERNAL 6$$ + RESETCIRCUIT + 205 + .234 )NTERNALRESET + &ILTER + + —& + + 34-&X + + AID + + 2. The reset network protects the device against parasitic resets. + + 3. The user must ensure that the wleilvl enlootnbethteakNeRnSinTtopiancccaonungtobbyetlhoewdtheevicVeIL. (NRST) max level specified in + Table 38. Otherwise the reset + +5.3.15 TIM timer characteristics + + The parameters given in Table 39 are guaranteed by design. + + Refer to Section 5.3.12: I/O current injection characteristics for details on the input/output + alternate function characteristics (output compare, input capture, external clock, PWM + output). + + Table 39. TIMx(1) characteristics + + Symbol Parameter Conditions Min Max Unit + + tres(TIM) Timer resolution time - 1 - tTIMxCLK + ns + fTIMxCLK = 72 MHz 13.9 - MHz + MHz + fEXT Timer external clock - 0 fTIMxCLK/2 bit + ResTIM 36 + tCOUNTER frequency on CH1 to CH4 fTIMxCLK = 72 MHz 0 16 tTIMxCLK + µs + Timer resolution - - 65536 + 910 tTIMxCLK + 16-bit counter clock period - 1 s + + when internal clock is fTIMxCLK = 72 MHz 0.0139 + selected + + - - 65536 × 65536 + tMAX_COUNT Maximum possible count fTIMxCLK = 72 MHz 59.6 + - + + 1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM3 and TIM4 timers. + +68/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + +5.3.16 Communications interfaces + + I2C interface characteristics + + The STM32F103xx performance line I2C interface meets the requirements of the standard + I2C communication protocol with the following restrictions: the I/O pins SDA and SCL are + mapped to are not “true” open-drain. When configured as open-drain, the PMOS connected + between the I/O pin and VDD is disabled, but is still present. + The I2C characteristics are described in Table 40. Refer also to Section 5.3.12: I/O current + injection characteristics for more details on the input/output alternate function characteristics + (SDA and SCL). + + Table 40. I2C characteristics + + Standard mode Fast mode I2C(1)(2) + I2C(1)(2) + Symbol Parameter Unit + + Min Max Min Max + + tw(SCLL) SCL clock low time 4.7 - 1.3 - + tw(SCLH) SCL clock high time µs + tsu(SDA) SDA setup time 4.0 - 0.6 + th(SDA) SDA data hold time + tr(SDA) 250 - 100 - + tr(SCL) SDA and SCL rise time 900(3) + tf(SDA) - 3450(3) - + tf(SCL) SDA and SCL fall time + th(STA) - 1000 - 300 ns + Start condition hold time + tsu(STA) Repeated Start condition - 300 - 300 + setup time + 4.0 - 0.6 - + µs + 4.7 - 0.6 + - + + tsu(STO) Stop condition setup time 4.0 - 0.6 - μs + + tw(STO:STA) Stop to Start condition time 4.7 - 1.3 - μs + (bus free) + + Cb Capacitive load for each bus - 400 - 400 pF + line + + Pulse width of spikes that 50(4) 50(4) + + tSP are suppressed by the 0 0 ns + + analog filter + + 1. Guaranteed by design. + + 2. afPcChLiKe1vemfuasstt be at least 2 MHz to achieve standard mode I2C frequencies. It must be at least 4 MHz to + mode I2C frequencies. It must be a multiple of 10 MHz to reach the 400 kHz maximum I2C + fast mode clock. + + 3. The maximum Data hold time has only to be met if the interface does not stretch the low period of SCL + signal. + + 4. The minimum width of the spikes filtered by the analog filter is above tSP(max). + + DocID13587 Rev 17 69/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Figure 32. I2C bus AC waveforms and measurement circuit + + 9''B,& 9''B,& + + 5S 5S 670)[ + + 5V + + 6'$ + + ,ð&EXV 5V + + 6&/ + + 6WDUWUHSHDWHG + + 6WDUW + + WVX 67$ 6WDUW + + 6' $ WU 6'$ WVX 6'$ WVX 67267$ + WI 6'$ + + WK 67$ WZ 6&/+ WK 6'$ 6WRS + + 6&/ WU 6&/ WI 6&/ WVX 672 + WZ 6&// + + DLJ + + 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. + 2. Rs = Series protection resistors, Rp = Pull-up resistors, VDD_I2C = I2C bus supply. + + Table 41. SCL frequency (fPCLK1= 36 MHz.,VDD_I2C = 3.3 V)(1)(2) + + fSCL (kHz) I2C_CCR value + RP = 4.7 kΩ + + 400 0x801E + + 300 0x8028 + + 200 0x803C + + 100 0x00B4 + + 50 0x0168 + + 20 0x0384 + + 1. RP = External pull-up resistance, fSCL = I2C speed, + 2. For speeds around 200 kHz, the tolerance on the achieved speed is of ±5%. For other speed ranges, the + + tolerance on the achieved speed ±2%. These variations depend on the accuracy of the external + components used to design the application. + +70/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + +SPI interface characteristics + +Unless otherwise specified, the parameters given in Table 42 are derived from tests +performed under the ambient temperature, fPCLKx frequency and VDD supply voltage +conditions summarized in Table 9. + +Refer to Section 5.3.12: I/O current injection characteristics for more details on the +input/output alternate function characteristics (NSS, SCK, MOSI, MISO). + + Table 42. SPI characteristics + +Symbol Parameter Conditions Min Max Unit + + fSCK SPI clock frequency Master mode - 18 MHz +1/tc(SCK) Slave mode + - 18 + +tr(SCK) SPI clock rise and fall Capacitive load: C = 30 pF - 8 ns +tf(SCK) time + +DuCy(SCK) SPI slave input clock Slave mode 30 70 % + duty cycle + +tsu(NSS)(1) NSS setup time Slave mode 4tPCLK - + +th(NSS)(1) NSS hold time Slave mode 2tPCLK - + +ttww((SSCCKKHL))((11)) SCK high and low time Master mode, fPCLK = 36 MHz, 50 60 + presc = 4 + +ttssuu((MSII))((11)) Data input setup time Master mode 5 - + Slave mode + 5 - + +th(MI) (1) Data input hold time Master mode 5 - +th(SI)(1) Slave mode + 4 - ns + +ta(SO)(1)(2) Data output access Slave mode, fPCLK = 20 MHz 0 3tPCLK + time + +tdis(SO)(1)(3) Data output disable Slave mode 2 10 + time + +tv(SO) (1) Data output valid time Slave mode (after enable edge) - 25 + +tv(MO)(1) Data output valid time Master mode (after enable edge) - 5 + +th(SO)(1) Data output hold time Slave mode (after enable edge) 15 - +th(MO)(1) Master mode (after enable edge) 2 - + +1. Guaranteed based on test during characterization. + +2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate + the data. + +3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put + the data in Hi-Z. + + DocID13587 Rev 17 71/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Figure 33. SPI timing diagram - slave mode and CPHA = 0 + + 166LQSXW WF 6&. WK 166 + W68 166 + W9 62 + 6&.,QSXW &3+$  WZ 6&.+ 06%287 + &32/  WZ 6&./ + 06%,1 + &3+$  WK 6, + &32/  + + WD 62 WK 62 WU 6&. WGLV 62 + %,7287 WI 6&. + + 0,62 %,7,1 /6%287 + 287387 + + WVX 6, + + 026, /6%,1 + ,1387 + + DLF + + Figure 34. SPI timing diagram - slave mode and CPHA = 1(1) + + 166LQSXW + + W68 166 WF 6&. WK 166 + +6&.LQSXW &3+$  WZ 6&.+ WY 62 + &32/  WZ 6&./ 06%287 + + &3+$  WK 6, + &32/  06%,1 + + WD 62 WK 62 WU 6&. WGLV 62 + WVX 6, %,7287 WI 6&. /6%287 + + 0,62 %,7,1 /6%,1 + 287387 + + 026, + ,1387 + + DLE + +1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. + +72/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + + Figure 35. SPI timing diagram - master mode(1) + + +LJK WF 6&. + 166LQSXW +6&.2XWSXW + &3+$  + &32/  + &3+$  + &32/  + +6&.2XWSXW &3+$  + &32/  + &3+$  WVX 0, WZ 6&.+ WU 6&. + &32/  WZ 6&./ WI 6&. + 06%,1 %,7,1 + 0,62 /6%,1 + ,13 87 WK 0, % , 7287 + 06%287 WK 02 + 026, /6%287 + 28738 7 WY 02 + + DLF + +1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. + +USB characteristics + +The USB interface is USB-IF certified (Full Speed). + + Table 43. USB startup time + + Symbol Parameter Max Unit + +tSTARTUP(1) USB transceiver startup time 1 µs + +1. Guaranteed by design. + + DocID13587 Rev 17 73/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Table 44. USB DC electrical characteristics + + Symbol Parameter Conditions Min.(1) Max.(1) Unit + + Input levels + + VDD USB operating voltage(2) 3.0(3) 3.6 V + VDI(4) Differential input sensitivity 0.2 + VCM(4) Differential common mode range I(USBDP, USBDM) 0.8 - + VSE(4) Single ended receiver threshold Includes VDI range 1.3 + 2.5 V + + 2.0 + + Output levels + + VOL Static output level low RL of 1.5 kΩ to 3.6 V(5) - 0.3 + VOH Static output level high V + RL of 15 kΩ to VSS(5) 2.8 + 3.6 + + 1. All the voltages are measured from the local ground potential. + + 2. To be compliant with the USB 2.0 full-speed electrical specification, the USBDP (D+) pin should be pulled + up with a 1.5 kΩ resistor to a 3.0-to-3.6 V voltage range. + + 3. The STM32F103xx USB functionality is ensured down to 2.7 V but not the full USB electrical + characteristics which are degraded in the 2.7-to-3.0 V VDD voltage range. + + 4. Guaranteed by design. + + 5. RL is the load connected on the USB drivers + + Figure 36. USB timings: definition of data signal rise and fall time + + 'LIIHUHQWLDO &URVVRYHU + GDWDOLQHV SRLQWV + + 9&56 + + 966 WU + + WI + + DL + + Table 45. USB: Full-speed electrical characteristics(1) + + Symbol Parameter Conditions Min Max Unit + + Driver characteristics + + tr Rise time(2) CL = 50 pF 4 20 ns + + tf Fall time(2) CL = 50 pF 4 20 ns + + trfm Rise/ fall time matching tr/tf 90 110 % + + VCRS Output signal crossover voltage - 1.3 2.0 V + + 1. Guaranteed by design. + 2. Measured from 10% to 90% of the data signal. For more detailed informations, please refer to USB + + Specification - Section 7 (version 2.0). + +5.3.17 CAN (controller area network) interface + + Refer to Section 5.3.12: I/O current injection characteristics for more details on the + input/output alternate function characteristics (CAN_TX and CAN_RX). + +74/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + +5.3.18 12-bit ADC characteristics + +Note: Unless otherwise specified, the parameters given in Table 46 are derived from tests + performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage + conditions summarized in Table 9. + + It is recommended to perform a calibration after each power-up. + + Table 46. ADC characteristics + + Symbol Parameter Conditions Min Typ Max Unit + + VDDA Power supply - 2.4 - 3.6 V + VREF+ Positive reference voltage - 2.4 - VDDA V + IVREF Current on the VREF input pin - 160(1) 220(1) µA + fADC ADC clock frequency - - - MHz + fS(2) Sampling rate - 0.6 - 14 MHz + fADC = 14 MHz 0.05 - 1 kHz + fTRIG(2) External trigger frequency - 823 1/fADC + - 17 V + VAIN(3) Conversion voltage range See Equation 1 and - - + External input impedance Table 47 for details 0 (VSSA or VREF- VREF+ kΩ + RAIN(2) tied to ground) - + 50 + - + + RADC(2) Sampling switch resistance - - - 1 kΩ + CADC(2) + Internal sample and hold - - - 8 pF + capacitor + fADC = 14 MHz µs + tCAL(2) Calibration time - 5.9 1/fADC + + fADC = 14 MHz 83 µs + - 1/fADC + tlat(2) Injection trigger conversion - - 0.214 + latency fADC = 14 MHz µs + - - - 3(4) 1/fADC + + tlatr(2) Regular trigger conversion fADC = 14 MHz - - 0.143 µs + latency - 1/fADC + - - - 2(4) + µs + tS(2) Sampling time fADC = 14 MHz 0.107 - 17.1 µs +tSTAB(2) Power-up time + - 1.5 - 239.5 1/fADC + + 0 0 1 + + Total conversion time 1 - 18 + (including sampling time) + tCONV(2) 14 to 252 (tS for sampling +12.5 for + successive approximation) + +1. Guaranteed based on test during characterization. + +2. Guaranteed by design. + +3. In devices delivered in VFQFPN aacnondmd LeFQiignFuPtrheep7aT.cFkBaGgeAs6,4VpRaEcFk+aisgeinhtearvnealalyVcRoEnFn+epcitnedbutot nVoDDVAREaFn-dpVinR(EVFR- EisF-inisteirnntaelrlnyally + connected to VVSSSSAA).,DseeveicTeasbtleha5t + connected to + +4. For external triggers, a delay of 1/fPCLK2 must be added to the latency specified in Table 46. + + DocID13587 Rev 17 75/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + EqRuAaItNio/6%,'($/   + + (*  ([DPSOHRIDQDFWX DOWUDQVIH UFXUYH +  7KHLGHDOWUDQVIHUFX UYH +    (QGSRLQWFRUUHODWLRQOLQH + (7  + (7 7RWDOXQDGMXVWHG(UURUPD[LPXPGHYLDWLRQ + (2 (/ EHWZHHQWKHDFWXDODQGWKHLGHDOWUDQVIHUFXUYHV +  (2 2IIVHW(UURUGHYLDWLRQEHWZHHQWKHILUVWDFWXDO +  (' WUDQVLWLRQDQGWKHODVWDFWXDORQH +  /6%,'($/ (* *DLQ(UURUGHYLDWLRQEHWZHHQWKHODVWLGHDO +  WUDQVLWLRQDQGWKHODVWDFWXDORQH +  (' 'LIIHUHQWLDO/LQHDULW\(UURUPD[LPXPGHYLDWLRQ +  EHWZHHQDFWXDOVWHSVDQGWKHLGHDORQH +  (/ ,QWHJUDO/LQHDULW\(UURUPD[LPXPGHYLDWLRQ + EHWZHHQDQ\DFWXDOWUDQVLWLRQDQGWKHHQGSRLQW + FRUUHODWLRQOLQH + +          + 9''$ + 966$ + + DLH + + DocID13587 Rev 17 77/117 + + 116 + Electrical characteristics STM32F103x8, STM32F103xB + + Figure 38. Typical connection diagram using the ADC + + 6$$ 34-&XX + 64 + 6 3AMPLEANDHOLD!$# + CONVERTER + 64 + 2!). !).X 6 2!$#  BIT + CONVERTER + ),›—! + #PARASITIC + 6!). + #!$# + + AIC + + 1. Refer to Table 46 for the values of RAIN, RADC and CADC. + + 2. Cpapdaracsaitpicarceitparnecseen(rtsouthgehlcya7papcFi)ta. nAcheigohf the PCB (dependent on soldering and PCB layout quality) plus the + this, fADC should be reduced. Cparasitic value will downgrade conversion accuracy. To remedy + + General PCB design guidelines + + Power supply decoupling should be performed as shown in Figure 39 or Figure 40, + depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be + ceramic (good quality). They should be placed them as close as possible to the chip. + + Figure 39. Power supply and reference decoupling (VREF+ not connected to VDDA) + + 670)[[ + + 95() + VHHQRWH + + —)Q) 9''$ + 966$ 95()± + —)Q) + VHHQRWH + + DLE + + 1. VREF+ and VREF– inputs are available only on 100-pin packages. + +78/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Electrical characteristics + + Figure 40. Power supply and reference decoupling (VREF+ connected to VDDA) + + 670)[[ + + 95()9''$ + 6HHQRWH + + —)Q) + + 95()±966$ + 6HHQRWH + + DL + +5.3.19 1. VREF+ and VREF– inputs are available only on 100-pin packages. + + Temperature sensor characteristics + + Table 50. TS characteristics + + Symbol Parameter Min Typ Max Unit + + TL(1) VSENSE linearity with temperature - ±1 ±2 °C + Avg_Slope(1) Average slope + Voltage at 25 °C 4.0 4.3 4.6 mV/°C + V25(1) + tSTART(2) Startup time 1.34 1.43 1.52 V + ADC sampling time when reading the + TS_temp(3)(2) temperature 4 - 10 µs + + - - 17.1 µs + + 1. Guaranteed based on test during characterization. + 2. Guaranteed by design. + 3. Shortest sampling time can be determined in the application by multiple iterations. + + DocID13587 Rev 17 79/117 + + 116 + Package information STM32F103x8, STM32F103xB + +6 Package information + + In order to meet environmental requirements, ST offers these devices in different grades of + ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® + specifications, grade definitions and product status are available at: www.st.com. + ECOPACK® is an ST trademark. + +6.1 VFQFPN36 6 x 6 mm, 0.5 mm pitch, package information + + Figure 41. VFQFPN36 - 36-pin, 6x6 mm, 0.5 mm pitch very thin profile fine pitch quad + flat package outline + + 6HDWLQJSODQH + + & GGG & + + $ $ + + $ ( $ +  E  + +   + + H + + ' ' + +  . +  + 3LQ,'  +  + 5  // + + ( + + :2?-%?6 + + 1. Drawing is not to scale. + +80/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +Table 51. VFQFPN36 - 36-pin, 6x6 mm, 0.5 mm pitch very thin profile fine pitch quad + flat package mechanical data + + millimeters inches(1) + +Symbol + + Min Typ Max Min Typ Max + +A 0.800 0.900 1.000 0.0315 0.0354 0.0394 + +A1 - 0.020 0.050 - 0.0008 0.0020 + +A2 - 0.650 1.000 - 0.0256 0.0394 + +A3 - 0.250 - - 0.0098 - + +b 0.180 0.230 0.300 0.0071 0.0091 0.0118 + +D 5.875 6.000 6.125 0.2313 0.2362 0.2411 + +D2 1.750 3.700 4.250 0.0689 0.1457 0.1673 + +E 5.875 6.000 6.125 0.2313 0.2362 0.2411 + +E2 1.750 3.700 4.250 0.0689 0.1457 0.1673 + +e 0.450 0.500 0.550 0.0177 0.0197 0.0217 + +L 0.350 0.550 0.750 0.0138 0.0217 0.0295 + +K 0.250 - - 0.0098 - - + +ddd - - 0.080 - - 0.0031 + +1. Values in inches are converted from mm and rounded to 4 decimal digits. + + DocID13587 Rev 17 81/117 + + 116 + Package information STM32F103x8, STM32F103xB + + Figure 42. VFQFPN36 - 36-pin, 6x6 mm, 0.5 mm pitch very thin profile fine pitch quad + flat package recommended footprint + +   + +   + +   +   + +   +  +   +  +  +   + +   + + :2?&0?6 + +82/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +Marking of engineering samples + +The following figure gives an example of topside marking orientation versus pin 1 identifier +location. + + Figure 43. VFPFPN36 package top view example + +3URGXFWLGHQWLILFDWLRQ  + + 670 + + )78 + + 'DWHFRGH 5HYLVLRQFRGH + + 3LQ < :: +LQGHQWLILHU + 5 + + 06Y9 + +1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet + qualified and therefore not yet ready to be used in production and any consequences deriving from such + usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering + samples in production. ST Quality has to be contacted prior to any decision to use these Engineering + samples to run qualification activity. + + DocID13587 Rev 17 83/117 + + 116 + Package information STM32F103x8, STM32F103xB + +6.2 UFQFPN48 7 x 7 mm, 0.5 mm pitch, package information + + Figure 44. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat + package outline + + 3LQLGHQWLILHU + ODVHUPDUNLQJDUHD + + ' + + $ + + (( 6HDWLQJ + 7 + GGG $ SODQH + ' + < H E + + 'HWDLO< + + ([SRVHGSDG ' + DUHD +  +  / + &[ƒ 'HWDLO= + SLQFRUQHU 5W\S + + ( + +  + + =  + + $%B0(B9 + + 1. Drawing is not to scale. + 2. There is an exposed die pad on the underside of the QFPN package, this pad is not internally connected to + + the VSS or VDD power pads. It is recommended to connect it to VSS. + 3. All leads/pads should also be soldered to the PCB to improve the lead solder joint life. + + Table 52. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat + package mechanical data + + millimeters inches(1) + + Symbol + + Min Typ Max Min Typ Max + + A 0.500 0.550 0.600 0.0197 0.0217 0.0236 + 0.020 0.050 0.0000 0.0008 0.0020 + A1 0.000 7.000 7.100 0.2717 0.2756 0.2795 + 7.000 7.100 0.2717 0.2756 0.2795 + D 6.900 5.600 5.700 0.2165 0.2205 0.2244 + + E 6.900 + + D2 5.500 + +84/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +Table 52. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat + package mechanical data (continued) + + millimeters inches(1) + +Symbol + + Min Typ Max Min Typ Max + +E2 5.500 5.600 5.700 0.2165 0.2205 0.2244 + 0.400 0.500 0.0118 0.0157 0.0197 +L 0.300 0.152 0.0060 + 0.250 - - 0.0098 - +T - 0.500 0.300 0.0079 0.0197 0.0118 + +b 0.200 - - - - - + 0.080 - 0.0031 +e - + +ddd - + +1. Values in inches are converted from mm and rounded to 4 decimal digits. + +Figure 45. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat + package recommended footprint + +  +  + +   +   + +   +  +  +  + +   + +   +   + +    +  + !"?&0?6 +1. Dimensions are expressed in millimeters. + + DocID13587 Rev 17 85/117 + + 116 + Package information STM32F103x8, STM32F103xB + + Marking of engineering samples + + The following figure gives an example of topside marking orientation versus pin 1 identifier + location. + + Figure 46. UFQFPN48 7 x 7 mm, 0.5 mm pitch, package top view example + + 3URGXFW 45.' + LGHQWLILFDWLRQ  $#6 + + 3LQ 'DWHFRGH 5HYLVLRQFRGH + LGHQWLILHU + : 88 + + 3 + + 069 + + 1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet + qualified and therefore not yet ready to be used in production and any consequences deriving from such + usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering + samples in production. ST Quality has to be contacted prior to any decision to use these Engineering + samples to run qualification activity. + +86/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +6.3 LFBGA100 10 x 10 mm, low-profile fine pitch ball grid array + + package information + + Figure 47. LFBGA100 - 100-ball low-profile fine pitch ball grid array, 10 x10 mm, + 0.8 mm pitch, package outline + + = 6HDWLQJSODQH + + GGG = + + $ $ $ $ + + ( $EDOO $EDOO ; + + H ) LGHQWLILHU LQGH[DUHD ( + + $ + ) + + ' ' + + H + + . < + +   ‘E EDOOV + + %277209,(: ‘ HHH 0 = < ; 7239,(: + ‘ III 0 = + +B0(B9 + + 1. Drawing is not to scale. + + Table 53. LFBGA100 – 100-ball low-profile fine pitch ball grid array, 10 x 10 mm, + 0.8 mm pitch, package mechanical data + + millimeters inches(1) + + Symbol Min Typ Max Min Typ Max + + A - - 1.700 - - 0.0669 + + A1 0.270 - - 0.0106 - - + + A2 - 0.300 - - 0.0118 - + + A4 - - 0.800 - - 0.0315 + + b 0.450 0.500 0.550 0.0177 0.0197 0.0217 + + D 9.850 10.000 10.150 0.3878 0.3937 0.3996 + + D1 - 7.200 - - 0.2835 - + + E 9.850 10.000 10.150 0.3878 0.3937 0.3996 + + E1 - 7.200 - - 0.2835 - + + e - 0.800 - - 0.0315 - + + F - 1.400 - - 0.0551 - + + ddd - - 0.120 - - 0.0047 + + DocID13587 Rev 17 87/117 + + 116 + Package information STM32F103x8, STM32F103xB + + Table 53. LFBGA100 – 100-ball low-profile fine pitch ball grid array, 10 x 10 mm, + 0.8 mm pitch, package mechanical data (continued) + + millimeters inches(1) + + Symbol Min Typ Max Min Typ Max + + eee - - 0.150 - - 0.0059 + + fff - - 0.080 - - 0.0031 + + 1. Values in inches are converted from mm and rounded to 4 decimal digits. + + Figure 48. LFBGA100 – 100-ball low-profile fine pitch ball grid array, 10 x 10 mm, + 0.8 mm pitch, package recommended footprint + + 'SDG + 'VP + + +B)3B9 + + Table 54. LFBGA100 recommended PCB design rules (0.8 mm pitch BGA) + + Dimension Recommended values + + Pitch 0.8 + + Dpad 0.500 mm + + Dsm 0.570 mm typ. (depends on the soldermask reg- + istration tolerance) + + Stencil opening 0.500 mm + + Stencil thickness Between 0.100 mm and 0.125 mm + + Pad trace width 0.120 mm + +88/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +Marking of engineering samples + +The following figure gives an example of topside marking orientation versus ball A1 identifier +location. + + Figure 49. LFBGA100 package top view example + +3URGXFWLGHQWLILFDWLRQ  5HYLVLRQFRGH + + 5 + 670) + 9+ + + 'DWHFRGH \HDUZHHN + + < :: + + %DOO$ + LQGHQWLILHU + + 06Y9 + +1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet + qualified and therefore not yet ready to be used in production and any consequences deriving from such + usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering + samples in production. ST Quality has to be contacted prior to any decision to use these Engineering + samples to run qualification activity. + + DocID13587 Rev 17 89/117 + + 116 + Package information STM32F103x8, STM32F103xB + +6.4 LQFP100 14 x 14 mm, 100-pin low-profile quad flat package + + information + + Figure 50. LQFP100, 14 x 14 mm 100-pin low-profile quad flat package outline + + 3%!4).'0,!.% + # + + ! ! ! C MM + % '!5'%0,!.% + CCC # % + % , + $ , + $ ! + $  + +   + +  + + B + +   +  + 0).  E + + )$%.4)&)#!4)/. + + ,?-%?6 + + Table 55. LQPF100, 14 x 14 mm 100-pin low-profile quad flat package mechanical + data + + Symbol millimeters inches(1) + + Min Typ Max Min Typ Max + + A - - 1.600 - - 0.0630 + + A1 0.050 - 0.150 0.0020 - 0.0059 + + A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 + + b 0.170 0.220 0.270 0.0067 0.0087 0.0106 + + c 0.090 - 0.2 0.0035 - 0.0079 + + D 15.800 16.000 16.200 0.6220 0.6299 0.6378 + + D1 13.800 14.000 14.200 0.5433 0.5512 0.5591 + + D3 - 12.000 - - 0.4724 - + + E 15.800 16.00 16.200 0.6220 0.6299 0.6378 + + E1 13.800 14.000 14.200 0.5433 0.5512 0.5591 + + E3 - 12.000 - - 0.4724 - + +90/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +Table 55. LQPF100, 14 x 14 mm 100-pin low-profile quad flat package mechanical data + (continued) + +Symbol millimeters inches(1) + + Min Typ Max Min Typ Max + +e - 0.500 - - 0.0197 - + +L 0.450 0.600 0.750 0.0177 0.0236 0.0295 + +L1 - 1.000 - - 0.0394 - + +k 0.0° 3.5° 7.0° 0.0° 3.5° 7.0° + +ccc -8 - 0.080 - - 0.0031 + +1. Values in inches are converted from mm and rounded to 4 decimal digits.. + + Figure 51. LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat + package recommended footprint + +   + +    + +  +   + +   +  +  +   +  + AIC +1. Dimensions are expressed in millimeters. + + DocID13587 Rev 17 91/117 + + 116 + Package information STM32F103x8, STM32F103xB + + Marking of engineering samples + + The following figure gives an example of topside marking orientation versus pin 1 identifier + location. + + Figure 52. LQFP100 package top view example + + 3URGXFWLGHQWLILFDWLRQ  + + 670) 5HYLVLRQFRGH + 975 + + 'DWHFRGH + + < :: + + 3LQ + LQGHQWLILHU + + 06Y9 + + 1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet + qualified and therefore not yet ready to be used in production and any consequences deriving from such + usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering + samples in production. ST Quality has to be contacted prior to any decision to use these Engineering + samples to run qualification activity. + +92/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +6.5 UFBGA100 7x 7 mm, ultra fine pitch ball grid array package + + information + + Figure 53. UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid + array package outline + + = 6HDWLQJSODQH + + GGG = + + $ $ $ $ $ + + ( $EDOO $EDOO ; + + H ) LGHQWLILHU LQGH[DUHD ( + + $ + ) + + ' ' + + H + + 0 < + +   ‘E EDOOV + + %277209,(: 7239,(: + + ‘ HHH 0 = < ; $&B0(B9 + + ‘ III 0 = + + 1. Drawing is not to scale. + + Table 56. UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array + package mechanical data + + Symbol millimeters inches(1) + + Min Typ Max Min Typ Max + + A 0.460 0.530 0.600 0.0181 0.0209 0.0236 + + A1 0.050 0.080 0.110 0.0020 0.0031 0.0043 + + A2 0.400 0.450 0.500 0.0157 0.0177 0.0197 + + A3 0.080 0.130 0.180 0.0031 0.0051 0.0071 + + A4 0.270 0.320 0.370 0.0106 0.0126 0.0146 + + b 0.200 0.250 0.300 0.0079 0.0098 0.0118 + + D 6.950 7.000 7.050 0.2736 0.2756 0.2776 + + D1 5.450 5.500 5.550 0.2146 0.2165 0.2185 + + E 6.950 7.000 7.050 0.2736 0.2756 0.2776 + + E1 5.450 5.500 5.550 0.2146 0.2165 0.2185 + + e - 0.500 - - 0.0197 - + + F 0.700 0.750 0.800 0.0276 0.0295 0.0315 + + DocID13587 Rev 17 93/117 + + 116 + Package information STM32F103x8, STM32F103xB + + Table 56. UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array + package mechanical data (continued) + + Symbol millimeters inches(1) + + Min Typ Max Min Typ Max + + ddd - - 0.100 - - 0.0039 + + eee - - 0.150 - - 0.0059 + + fff - -- 0.050 - - 0.0020 + + 1. Values in inches are converted from mm and rounded to 4 decimal digits. + + Figure 54. UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid + array package recommended footprint + + 'SDG + 'VP + + $&B)3B9 + + Table 57. UFBGA100 recommended PCB design rules (0.5 mm pitch BGA) + + Dimension Recommended values + + Pitch 0.5 + + Dpad 0.280 mm + + Dsm 0.370 mm typ. (depends on the soldermask reg- + istration tolerance) + + Stencil opening 0.280 mm + + Stencil thickness Between 0.100 mm and 0.125 mm + +94/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +Marking of engineering samples + +The following figure gives an example of topside marking orientation versus ball A1 identifier +location. + + Figure 55. UFBGA100 package top view example + +3URGXFW 45.' +LGHQWLILFDWLRQ  7#* + +%DOO$ 'DWHFRGH 5HYLVLRQFRGH +LGHQWLILHU + : 88 + + 3 + + 069 + +1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet + qualified and therefore not yet ready to be used in production and any consequences deriving from such + usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering + samples in production. ST Quality has to be contacted prior to any decision to use these Engineering + samples to run qualification activity. + + DocID13587 Rev 17 95/117 + + 116 + Package information STM32F103x8, STM32F103xB + +6.6 LQFP64 10 x 10 mm, 64-pin low-profile quad flat package + + information + + Figure 56. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package outline + + 6($7,1*3/$1( + & + + $ PP + $ *$8*(3/$1( + $ + F + + FFF & $ . + ' / + ' + ' / + +   +  +  + + E + + ( ( + ( + +   + + 3,1   + H + ,'(17,),&$7,21 + + :B0(B9 + + 1. Drawing is not to scale. + + Table 58. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package + mechanical data + + millimeters inches(1) + + Symbol + + Min Typ Max Min Typ Max + + A - - 1.600 - - 0.0630 + + A1 0.050 - 0.150 0.0020 - 0.0059 + + A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 + + b 0.170 0.220 0.270 0.0067 0.0087 0.0106 + + c 0.090 - 0.200 0.0035 - 0.0079 + + D - 12.000 - - 0.4724 - + + D1 - 10.000 - - 0.3937 - + + D3 - 7.500 - - 0.2953 - + + E - 12.000 - - 0.4724 - + + E1 - 10.000 - - 0.3937 - + +96/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + + Table 58. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package + mechanical data (continued) + + millimeters inches(1) + +Symbol + + Min Typ Max Min Typ Max + +E3 - 7.500 - - 0.2953 - + +e - 0.500 - - 0.0197 - + +K 0° 3.5° 7° 0° 3.5° 7° + +L 0.450 0.600 0.750 0.0177 0.0236 0.0295 + +L1 - 1.000 - - 0.0394 - + +ccc - - 0.080 - - 0.0031 + +1. Values in inches are converted from mm and rounded to 4 decimal digits. + + Figure 57. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package + recommended footprint + +   +  +  + +   + +    +   +   +   +  +1. Dimensions are expressed in millimeters. + AIC + + DocID13587 Rev 17 97/117 + + 116 + Package information STM32F103x8, STM32F103xB + + Marking of engineering samples + + The following figure gives an example of topside marking orientation versus pin 1 identifier + location. + + Figure 58. LQFP64 package top view example + + 3URGXFWLGHQWLILFDWLRQ  5HYLVLRQFRGH + + 5 + 670) + 57 + + 'DWHFRGH + + < :: + + 3LQ + LQGHQWLILHU + + 06Y9 + + 1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet + qualified and therefore not yet ready to be used in production and any consequences deriving from such + usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering + samples in production. ST Quality has to be contacted prior to any decision to use these Engineering + samples to run qualification activity. + +98/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +6.7 TFBGA64 5 x 5 mm, thin profile fine pitch package + + information + + Figure 59. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball grid + array package outline + + $ ( + ( + H ) + + + + ) + + ' ‘E EDOOV ' + % H + ‘ HHH 0 & % $ + ‘ III 0 & + + $ + +   + + 7239,(: $EDOO $EDOO %277209,(: + & 6HDWLQJSODQH LQGH[DUHD LGHQWLILHU + + GGG & + + $ $ 6,'(9,(: $ $ + + 5B0(B9 + + 1. Drawing is not to scale. + + Table 59. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball grid + array package mechanical data + + millimeters inches(1) + + Symbol + + Min Typ Max Min Typ Max + + A - - 1.200 - - 0.0472 + + A1 0.150 - - 0.0059 - - + + A2 - 0.200 - - 0.0079 - + + A4 - - 0.600 - - 0.0236 + + b 0.250 0.300 0.350 0.0098 0.0118 0.0138 + + D 4.850 5.000 5.150 0.1909 0.1969 0.2028 + + D1 - 3.500 - - 0.1378 - + + E 4.850 5.000 5.150 0.1909 0.1969 0.2028 + + E1 - 3.500 - - 0.1378 - + + e - 0.500 - - 0.0197 - + + F - 0.750 - - 0.0295 - + + DocID13587 Rev 17 99/117 + + 116 + Package information STM32F103x8, STM32F103xB + + Table 59. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball grid + array package mechanical data (continued) + + millimeters inches(1) + + Symbol + + Min Typ Max Min Typ Max + + ddd - - 0.080 - - 0.0031 + + eee - - 0.150 - - 0.0059 + + fff - - 0.050 - - 0.0020 + + 1. Values in inches are converted from mm and rounded to 4 decimal digits. + + Figure 60. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball grid + array package recommended footprint + + 'SDG + 'VP + + 5B)3B9 + + Table 60. TFBGA64 recommended PCB design rules (0.5 mm pitch BGA) + + Dimension Recommended values + + Pitch 0.5 + Dpad 0.280 mm + 0.370 mm typ. (depends on the soldermask + Dsm registration tolerance) + 0.280 mm + Stencil opening Between 0.100 mm and 1.125 mm + Stencil thickness 0.100 mm + Pad trace width + +100/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +Marking of engineering samples + +The following gives an example of topside marking orientation versus ball A1 identifier +location. + + Figure 61. TFBGA64 package top view example + + 3URGXFWLGHQWLILFDWLRQ  + + ) + + 'DWHFRGH 5HYLVLRQFRGH + + %DOO$ < :: + LQGHQWLILHU + 5 + + 06Y9 + +1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet + qualified and therefore not yet ready to be used in production and any consequences deriving from such + usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering + samples in production. ST Quality has to be contacted prior to any decision to use these Engineering + samples to run qualification activity. + + DocID13587 Rev 17 101/117 + + 116 + Package information STM32F103x8, STM32F103xB + +6.8 LQFP48 7 x 7 mm, 48-pin low-profile quad flat package + + information + + Figure 62. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline + + 3%!4).' + 0,!.% + # + + ! C + ! + ! MM + '!5'%0,!.% + CCC # ! + + + $ , + $ , + $ +  +   + +  + + B + + % % % + +   + + 0).  + )$%.4)&)#!4)/.  + E + "?-%?6 + + 1. Drawing is not to scale. + + Table 61. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package + mechanical data + + millimeters inches(1) + + Symbol + + Min Typ Max Min Typ Max + + A - - 1.600 - - 0.0630 + + A1 0.050 - 0.150 0.0020 - 0.0059 + + A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 + + b 0.170 0.220 0.270 0.0067 0.0087 0.0106 + + c 0.090 - 0.200 0.0035 - 0.0079 + + D 8.800 9.000 9.200 0.3465 0.3543 0.3622 + + D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 + + D3 - 5.500 - - 0.2165 - + +102/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + + Table 61. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package + mechanical data (continued) + + millimeters inches(1) + +Symbol + + Min Typ Max Min Typ Max + +E 8.800 9.000 9.200 0.3465 0.3543 0.3622 + +E1 6.800 7.000 7.200 0.2677 0.2756 0.2835 + +E3 - 5.500 - - 0.2165 - + +e - 0.500 - - 0.0197 - + +L 0.450 0.600 0.750 0.0177 0.0236 0.0295 + +L1 - 1.000 - - 0.0394 - + +k 0° 3.5° 7° 0° 3.5° 7° + +ccc - - 0.080 - - 0.0031 + +1. Values in inches are converted from mm and rounded to 4 decimal digits. + + Figure 63. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package + recommended footprint + +  +  + +    +  +  + +   + +   + +   +   + +   + +  AID +  + +1. Dimensions are expressed in millimeters. + + DocID13587 Rev 17 103/117 + + 116 + Package information STM32F103x8, STM32F103xB + + Marking of engineering samples + + The following figure gives an example of topside marking orientation versus pin 1 identifier + location. + + Figure 64. LQFP48 package top view example + + 3URGXFW 45. + LGHQWLILFDWLRQ  '$#5 + + 3LQ 'DWHFRGH 5HYLVLRQFRGH + LGHQWLILFDWLRQ + : 88 + + 3 + + 069 + + 1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet + qualified and therefore not yet ready to be used in production and any consequences deriving from such + usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering + samples in production. ST Quality has to be contacted prior to any decision to use these Engineering + samples to run qualification activity. + +104/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +6.9 Thermal characteristics + +6.9.1 The maximum chip junction temperature (TJmax) must never exceed the values given in + Table 9: General operating conditions on page 38. + + The maximum chip-junction temperature, TJ max, in degrees Celsius, may be calculated + using the following equation: + + TJ max = TA max + (PD max × ΘJA) + Where: + • TA max is the maximum ambient temperature in ° C, + • ΘJA is the package junction-to-ambient thermal resistance, in ° C/W, + • PD max is the sum of PINT max and PI/O max (PD max = PINT max + PI/Omax), + • PINT max is the product of IDD and VDD, expressed in Watts. This is the maximum chip + + internal power. + + PI/O max represents the maximum power dissipation on output pins where: + PI/O max = Σ (VOL × IOL) + Σ((VDD – VOH) × IOH), + + taking into account the actual VOL / IOL and VOH / IOH of the I/Os at low and high level in the + application. + + Table 62. Package thermal characteristics + + Symbol Parameter Value Unit + 44 °C/W + Thermal resistance junction-ambient 46 + LFBGA100 - 10 × 10 mm / 0.8 mm pitch 59 + 45 + Thermal resistance junction-ambient 65 + LQFP100 - 14 × 14 mm / 0.5 mm pitch 55 + 32 + Thermal resistance junction-ambient 18 + UFBGA100 - 7 × 7 mm /0.5 mm pitch + + Thermal resistance junction-ambient + LQFP64 - 10 × 10 mm / 0.5 mm pitch + ΘJA Thermal resistance junction-ambient + TFBGA64 - 5 × 5 mm / 0.5 mm pitch + + Thermal resistance junction-ambient + LQFP48 - 7 x 7 mm / 0.5 mm pitch + + Thermal resistance junction-ambient + UFQFPN 48 - 7 × 7 mm / 0.5 mm pitch + + Thermal resistance junction-ambient + VFQFPN 36 - 6 × 6 mm / 0.5 mm pitch + + Reference document + + JESD51-2 Integrated Circuits Thermal Test Method Environment Conditions - Natural + Convection (Still Air). Available from www.jedec.org. + + DocID13587 Rev 17 105/117 + + 116 + Package information STM32F103x8, STM32F103xB + +6.9.2 Selecting the product temperature range + + When ordering the microcontroller, the temperature range is specified in the ordering + information scheme shown in Table 63: Ordering information scheme. + + Each temperature range suffix corresponds to a specific guaranteed ambient temperature at + maximum dissipation and, to a specific maximum junction temperature. + + As applications do not commonly use the STM32F103xx at maximum dissipation, it is useful + to calculate the exact power consumption and junction temperature to determine which + temperature range will be best suited to the application. + + The following examples show how to calculate the temperature range needed for a given + application. + + Example 1: High-performance application + + Assuming the following application conditions: + Maximum ambient temperature TAmax = 82 °C (measured according to JESD51-2), + IDDmax = 50 mA, VDD = 3.5 V, maximum 20 I/Os used at the same time in output at low + level with IOL = 8 mA, VOL= 0.4 V and maximum 8 I/Os used at the same time in output + at low level with IOL = 20 mA, VOL= 1.3 V + PINTmax = 50 mA × 3.5 V= 175 mW + PIOmax = 20 × 8 mA × 0.4 V + 8 × 20 mA × 1.3 V = 272 mW + This gives: PINTmax = 175 mW and PIOmax = 272 mW: + PDmax = 175 + 272 = 447 mW + + Thus: PDmax = 447 mW + Using the values obtained in Table 62 TJmax is calculated as follows: + + – For LQFP100, 46 °C/W + TJmax = 82 °C + (46 °C/W × 447 mW) = 82 °C + 20.6 °C = 102.6 °C + This is within the range of the suffix 6 version parts (–40 < TJ < 105 °C). + In this case, parts must be ordered at least with the temperature range suffix 6 (see + Table 63: Ordering information scheme). + + Example 2: High-temperature application + + Using the same rules, it is possible to address applications that run at high ambient + temperatures with a low dissipation, as long as junction temperature TJ remains within the + specified range. + + Assuming the following application conditions: + Maximum ambient temperature TAmax = 115 °C (measured according to JESD51-2), + IDDmax = 20 mA, VDD = 3.5 V, maximum 20 I/Os used at the same time in output at low + level with IOL = 8 mA, VOL= 0.4 V + PINTmax = 20 mA × 3.5 V= 70 mW + PIOmax = 20 × 8 mA × 0.4 V = 64 mW + This gives: PINTmax = 70 mW and PIOmax = 64 mW: + PDmax = 70 + 64 = 134 mW + + Thus: PDmax = 134 mW + +106/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Package information + +Using the values obtained in Table 62 TJmax is calculated as follows: + – For LQFP100, 46 °C/W + TJmax = 115 °C + (46 °C/W × 134 mW) = 115 °C + 6.2 °C = 121.2 °C + +This is within the range of the suffix 7 version parts (–40 < TJ < 125 °C). +In this case, parts must be ordered at least with the temperature range suffix 7 (see +Table 63: Ordering information scheme). + + Figure 65. LQFP100 PD max vs. TA + +PD (mW) 700 Suffix 6 + 600 Suffix 7 + 500 + 400 + 300 + 200 + 100 + + 0 + 65 75 85 95 105 115 125 135 + + TA (°C) + + DocID13587 Rev 17 107/117 + + 116 + Ordering information scheme STM32F103x8, STM32F103xB + +7 Ordering information scheme + + Table 63. Ordering information scheme + + Example: STM32 F 103 C 8 T 7 xxx + + Device family + STM32 = ARM-based 32-bit microcontroller + + Product type + F = general-purpose + + Device subfamily + 103 = performance line + + Pin count + T = 36 pins + C = 48 pins + R = 64 pins + V = 100 pins + + Flash memory size + 8 = 64 Kbytes of Flash memory + B = 128 Kbytes of Flash memory + + Package + H = BGA + I = UFBGA + T = LQFP + U = VFQFPN or UFQFPN + + Temperature range + 6 = Industrial temperature range, –40 to 85 °C. + 7 = Industrial temperature range, –40 to 105 °C. + + Options + xxx = programmed parts + TR = tape and real + + For a list of available options (speed, package, etc.) or for further information on any aspect + of this device, please contact your nearest ST sales office. + +108/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Revision history + +8 Revision history + + Table 64. Document revision history + + Date Revision Changes + 01-jun-2007 + 1 Initial release. + 20-Jul-2007 + Flash memory size modified in Note 9, Note 5, Note 7, Note 7 and + BGA100 pins added to Table 5: Medium-density STM32F103xx pin + definitions. Figure 3: STM32F103xx performance line LFBGA100 + ballout added. + + THSE changed to TLSE in Figure 23: Low-speed external clock source + AC timing diagram. VBAT ranged modified in Power supply schemes. + tSU(LSE) changed to tSU(HSE) in Table 22: HSE 4-16 MHz oscillator + characteristics. IDD(HSI) max value added to Table 24: HSI oscillator + characteristics. + + Sample size modified and machine model removed in Electrostatic + discharge (ESD). + + Number of parts modified and standard reference updated in Static + + latch-up. 25 °C and 85 °C conditions removed and class name + + modified in Table 33: Electrical sensitivities. RPU and RPD min and max + values added to Table 35: I/O static characteristics. RPU min and max + 2 values added to Table 38: NRST pin characteristics. + + Figure 32: I2C bus AC waveforms and measurement circuit and + Figure 31: Recommended NRST pin protection corrected. + + Notes removed below Table 9, Table 38, Table 44. + + IDD typical values changed in Table 11: Maximum current consumption + in Run and Sleep modes. Table 39: TIMx characteristics modified. + + tSTAB, VREF+ value, tlat and fTRIG added to Table 46: ADC + characteristics. + + In Table : , typical endurance and data retention for TA = 85 °C added, + data retention for TA = 25 °C removed. + VBG changed to VREFINT in Table 12: Embedded internal reference + voltage. Document title changed. Controller area network (CAN) + section modified. + + Figure 14: Power supply scheme modified. + + Features on page 1 list optimized. Small text changes. + + DocID13587 Rev 17 109/117 + + 116 + Revision history STM32F103x8, STM32F103xB + + Table 64. Document revision history (continued) + + Date Revision Changes + 18-Oct-2007 + STM32F103CBT6, STM32F103T6 and STM32F103T8 root part + numbers added (see Table 2: STM32F103xx medium-density device + features and peripheral counts) + + VFQFPN36 package added (see Section 6: Package information). All + packages are ECOPACK® compliant. Package mechanical data inch + values are calculated from mm and rounded to 4 decimal digits (see + Section 6: Package information). + Table 5: Medium-density STM32F103xx pin definitions updated and + clarified. + + Table 26: Low-power mode wakeup timings updated. + + TA min corrected in Table 12: Embedded internal reference voltage. + Note 2 added below Table 22: HSE 4-16 MHz oscillator characteristics. + + VESD(CDM) value added to Table 32: ESD absolute maximum ratings. + + Note 4 added and VOH parameter description modified in Table 36: + Output voltage characteristics. + + Note 1 modified under Table 37: I/O AC characteristics. + + Equation 1 and Table 47: RAIN max for fADC = 14 MHz added to + + Section 5.3.18: 12-bit ADC characteristics. + + VAIN, tS max, tCONV, VREF+ min and tlat max modified, notes modified + and tlatr added in Table 46: ADC characteristics. + Figure 37: ADC accuracy characteristics updated. Note 1 modified + + below Figure 38: Typical connection diagram using the ADC. + + Electrostatic discharge (ESD) on page 60 modified. + + Number of TIM4 channels modified in Figure 1: STM32F103xx + + 3 performance line block diagram. + + Maximum current consumption Table 13, Table 14 and Table 15 + + updated. Vhysmodified in Table 35: I/O static characteristics. + Table 49: ADC accuracy updated. VFESD value added in Table 30: + EMS characteristics. + + Values corrected, note 2 modified and note 3 removed in Table 26: + Low-power mode wakeup timings. + Table 16: Typical and maximum current consumptions in Stop and + Standby modes: Typical values added for VDD/VBAT = 2.4 V, Note 2 + modified, Note 2 added. + Table 21: Typical current consumption in Standby mode added. On- + chip peripheral current consumption on page 50 added. + ACCHSI values updated in Table 24: HSI oscillator characteristics. + Vprog added to Table 28: Flash memory characteristics. + Upper option byte address modified in Figure 11: Memory map. + Typical fLSI value added in Table 25: LSI oscillator characteristics and + internal RC value corrected from 32 to 40 kHz in entire document. + TS_temp added to Table 50: TS characteristics. NEND modified in + Table : . + TS_vrefint added to Table 12: Embedded internal reference voltage. + Handling of unused pins specified in General input/output + characteristics on page 62. All I/Os are CMOS and TTL compliant. + Figure 39: Power supply and reference decoupling (VREF+ not + connected to VDDA) modified. + tJITTER and fVCO removed from Table 27: PLL characteristics. + Appendix A: Important notes on page 81 added. + Added Figure 16, Figure 17, Figure 19 and Figure 21. + +110/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Revision history + + Table 64. Document revision history (continued) + + Date Revision Changes +22-Nov-2007 + Document status promoted from preliminary data to datasheet. + + The STM32F103xx is USB certified. Small text changes. + + Power supply schemes on page 15 modified. Number of + + communication peripherals corrected for STM32F103Tx and number of + + GPIOs corrected for LQFP package in Table 2: STM32F103xx + + medium-density device features and peripheral counts. + + Main function and default alternate function modified for PC14 and + + PC15 in, Note 6 added and Remap column added in Table 5: Medium- + + density STM32F103xx pin definitions. + + VDD–VSS ratings and Note 1 modified in Table 6: Voltage + characteristics, Note 1 modified in Table 7: Current characteristics. + + Note 1 and Note 2 added in Table 11: Embedded reset and power + + control block characteristics. + + IDD value at 72 MHz with peripherals enabled modified in Table 14: + Maximum current consumption in Run mode, code with data + + processing running from RAM. + + IDD value at 72 MHz with peripherals enabled modified in Table 15: + Maximum current consumption in Sleep mode, code running from + + Flash or RAM on page 44. + + IDD_VBAT typical value at 2.4 V modified and IDD_VBAT maximum values + added in Table 16: Typical and maximum current consumptions in Stop + + and Standby modes. Note added in Table 17 on page 48 and Table 18 + + on page 49. ADC1 and ADC2 consumption and notes modified in + + Table 19: Peripheral current consumption. + + tSU(HSE) and tSU(LSE) conditions modified in Table 22 and Table 23, + respectively. + + 4 Maximum values removed from Table 26: Low-power mode wakeup + + timings. tRET conditions modified in Table : . Figure 14: Power supply + scheme corrected. + + Figure 20: Typical current consumption in Stop mode with regulator in + + Low-power mode versus temperature at VDD = 3.3 V and 3.6 V added. + + Note removed below Figure 33: SPI timing diagram - slave mode and + + CPHA = 0. Note added below Figure 34: SPI timing diagram - slave + + mode and CPHA = 1(1). + + Details on unused pins removed from General input/output + + characteristics on page 62. + + Table 42: SPI characteristics updated. Table 43: USB startup time + + added. VAIN, tlat and tlatr modified, note added and Ilkg removed in + Table 46: ADC characteristics. Test conditions modified and note + + added in Table 49: ADC accuracy. Note added below Table 47 and + + Table 50. + + Inch values corrected in Table 55: LQPF100, 14 x 14 mm 100-pin low- + + profile quad flat package mechanical data, Table 58: LQFP64 - 64-pin, + + 10 x 10 mm low-profile quad flat package mechanical data and + + Table 60: LQFP48, 7 x 7 mm, 48-pin low-profile quad flat package + + mechanical data. + + ΘJAvalue for VFQFPN36 package added in Table 62: Package thermal + + characteristics. + + Order codes replaced by Section 7: Ordering information scheme. + + MCU ‘s operating conditions modified in Typical current consumption + + on page 47. Avg_Slope and V25 modified in Table 50: TS + characteristics. I2C interface characteristics on page 69 modified. + + Impedance specified in A.4: Voltage glitch on ADC input 0 on page 81. + + DocID13587 Rev 17 111/117 + + 116 + Revision history STM32F103x8, STM32F103xB + + Table 64. Document revision history (continued) + + Date Revision Changes + + Figure 2: Clock tree on page 12 added. + + Maximum TJ value given in Table 8: Thermal characteristics on + page 38. + + CRC feature added (see CRC (cyclic redundancy check) calculation + unit on page 9 and Figure 11: Memory map on page 34 for address). + + IDD modified in Table 16: Typical and maximum current consumptions + in Stop and Standby modes. + + ACCHSI modified in Table 24: HSI oscillator characteristics on page 56, + note 2 removed. + + PD, TA and TJ added, tprog values modified and tprog description + clarified in Table 28: Flash memory characteristics on page 57. + + tRET modified in Table : . + + 14-Mar-2008 5 VNF(NRST) unit corrected in Table 38: NRST pin characteristics on + + page 67. + + Table 42: SPI characteristics on page 71 modified. + + IVREF added to Table 46: ADC characteristics on page 75. + Table 48: ADC accuracy - limited test conditions added. Table 49: ADC + accuracy modified. + + LQFP100 package specifications updated (see Section 6: Package + information on page 80). + + Recommended LQFP100, LQFP 64, LQFP48 and VFQFPN36 + footprints added (see Figure 55, Figure 60, Figure 64 and Figure 44). + + Section 6.9: Thermal characteristics on page 105 modified, + Section 6.9.1 and Section 6.9.2 added. + + Appendix A: Important notes on page 81 removed. + + Small text changes. Figure 11: Memory map clarified. + + In Table : : + + – NEND tested over the whole temperature range + + 21-Mar-2008 6 – cycling conditions specified for tRET + 22-May-2008 + – tRET min modified at TA = 55 °C + + V25, Avg_Slope and TL modified in Table 50: TS characteristics. + + CRC feature removed. + + CRC feature added back. Small text changes. Section 1: Introduction + modified. Section 2.2: Full compatibility throughout the family added. + + IDD at TA max = 105 °C added to Table 16: Typical and maximum + current consumptions in Stop and Standby modes on page 45. + + IDD_VBAT removed from Table 21: Typical current consumption in + Standby mode on page 47. + + Values added to Table 41: SCL frequency (fPCLK1= 36 + + 7 MHz.,VDD_I2C = 3.3 V) on page 70. + + Figure 33: SPI timing diagram - slave mode and CPHA = 0 on page 72 + modified. Equation 1 corrected. + + tRET at TA = 105 °C modified in Table : on page 58. + VUSB added to Table 44: USB DC electrical characteristics on page 74. + Figure 65: LQFP100 PD max vs. TA on page 107 modified. + + Axx option added to Table 63: Ordering information scheme on + page 108. + +112/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Revision history + + Table 64. Document revision history (continued) + + Date Revision Changes +21-Jul-2008 +22-Sep-2008 Power supply supervisor updated and VDDA added to Table 9: General + operating conditions. + + Capacitance modified in Figure 14: Power supply scheme on page 36. + + Table notes revised in Section 5: Electrical characteristics. + + Table 16: Typical and maximum current consumptions in Stop and + Standby modes modified. + + Data added to Table 16: Typical and maximum current consumptions in + Stop and Standby modes and Table 21: Typical current consumption in + Standby mode removed. + + fHSE_ext modified in Table 20: High-speed external user clock + characteristics on page 51. fPLL_IN modified in Table 27: PLL + characteristics on page 57. + + 8 Minimum SDA and SCL fall time value for Fast mode removed from + + Table 40: I2C characteristics on page 69, note 1 modified. + + th(NSS) modified in Table 42: SPI characteristics on page 71 and + Figure 33: SPI timing diagram - slave mode and CPHA = 0 on page 72. + + CADC modified in Table 46: ADC characteristics on page 75 and + Figure 38: Typical connection diagram using the ADC modified. + + Typical TS_temp value removed from Table 50: TS characteristics on + page 79. + + LQFP48 package specifications updated (see Table 60 and Table 64), + Section 6: Package information revised. + + Axx option removed from Table 63: Ordering information scheme on + page 108. + + Small text changes. + + STM32F103x6 part numbers removed (see Table 63: Ordering + information scheme). Small text changes. + + General-purpose timers (TIMx) and Advanced-control timer (TIM1) on + page 18 updated. + + Notes updated in Table 5: Medium-density STM32F103xx pin + definitions on page 28. + + Note 2 modified below Table 6: Voltage characteristics on page 37, + + |ΔVDDx| min and |ΔVDDx| min removed. + + 9 Measurement conditions specified in Section 5.3.5: Supply current + + characteristics on page 41. + + IDD in standby mode at 85 °C modified in Table 16: Typical and + maximum current consumptions in Stop and Standby modes on + page 45. + + General input/output characteristics on page 62 modified. + + fHCLK conditions modified in Table 30: EMS characteristics on page 59. + ΘJA and pitch value modified for LFBGA100 package in Table 62: + Package thermal characteristics. Small text changes. + + DocID13587 Rev 17 113/117 + + 116 + Revision history STM32F103x8, STM32F103xB + + Table 64. Document revision history (continued) + + Date Revision Changes + 23-Apr-2009 + I/O information clarified on page 1. + 22-Sep-2009 Figure 3: STM32F103xx performance line LFBGA100 ballout modified. + 03-Jun-2010 Figure 11: Memory map modified. Table 4: Timer feature comparison + added. + PB4, PB13, PB14, PB15, PB3/TRACESWO moved from Default + column to Remap column in Table 5: Medium-density STM32F103xx + pin definitions. + + PD for LFBGA100 corrected in Table 9: General operating conditions. + + 10 Note modified in Table 13: Maximum current consumption in Run + mode, code with data processing running from Flash and Table 15: + + Maximum current consumption in Sleep mode, code running from + + Flash or RAM. + + Table 20: High-speed external user clock characteristics and Table 21: + Low-speed external user clock characteristics modified. + + Figure 20 shows a typical curve (title modified). ACCHSI max values + modified in Table 24: HSI oscillator characteristics. + + TFBGA64 package added (see Table 59 and Table 60). Small text + changes. + + Note 5 updated and Note 4 added in Table 5: Medium-density + STM32F103xx pin definitions. + + VRERINT and TCoeff added to Table 12: Embedded internal reference + voltage. IDD_VBAT value added to Table 16: Typical and maximum + current consumptions in Stop and Standby modes. Figure 18: Typical + current consumption on VBAT with RTC on versus temperature at + different VBAT values added. + + fHSE_ext min modified in Table 20: High-speed external user clock + characteristics. + + CL1 and CL2 replaced by C in Table 22: HSE 4-16 MHz oscillator + characteristics and Table 23: LSE oscillator characteristics (fLSE = + + 11 32.768 kHz), notes modified and moved below the tables. Table 24: + + HSI oscillator characteristics modified. Conditions removed from + + Table 26: Low-power mode wakeup timings. + + Note 1 modified below Figure 24: Typical application with an 8 MHz + crystal. + + IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to + IEC 61967-2 in Section 5.3.10: EMC characteristics on page 58. + + Jitter added to Table 27: PLL characteristics. + + Table 42: SPI characteristics modified. + + CADC and RAIN parameters modified in Table 46: ADC characteristics. + RAIN max values modified in Table 47: RAIN max for fADC = 14 MHz. + Figure 47: LFBGA100 - 100-ball low-profile fine pitch ball grid array, 10 + x10 mm, 0.8 mm pitch, package outline updated. + + Added STM32F103TB devices. + + Added VFQFPN48 package. + + 12 Updated note 2 below Table 40: I2C characteristics + Updated Figure 32: I2C bus AC waveforms and measurement circuit + + Updated Figure 31: Recommended NRST pin protection + + Updated Section 5.3.12: I/O current injection characteristics + +114/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB Revision history + + Table 64. Document revision history (continued) + +Date Revision Changes + + Updated footnotes below Table 6: Voltage characteristics on page 37 + and Table 7: Current characteristics on page 37 + + Updated tw min in Table 20: High-speed external user clock + +19-Apr-2011 13 characteristics on page 51 + + Updated startup time in Table 23: LSE oscillator characteristics (fLSE = + + 32.768 kHz) on page 54 + + Added Section 5.3.12: I/O current injection characteristics + + Updated Section 5.3.13: I/O port characteristics + + Added UFBGA100 7 x 7 mm. + +07-Dec-2012 14 Updated Figure 59: LQFP64, 10 x 10 mm, 64-pin low-profile quad flat + + package outline to add pin 1 identification. + + Replaced VQFN48 package with UQFN48 in cover page packages, + Table 2: STM32F103xx medium-density device features and peripheral + counts, Figure 9: STM32F103xx performance line UFQFPN48 pinout, + Table 2: STM32F103xx medium-density device features and peripheral + counts, Table 56: UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra + fine pitch ball grid array package mechanical data, Table 63: Ordering + information scheme and updated Table 62: Package thermal + characteristics + + Added footnote for TFBGA ADC channels in Table 2: STM32F103xx + medium-density device features and peripheral counts + + Updated ‘All GPIOs are high current...’ in Section 2.3.21: GPIOs + (general-purpose inputs/outputs) + + Updated Table 5: Medium-density STM32F103xx pin definitions + + Corrected Sigma letter in Section 5.1.1: Minimum and maximum values + +14-May-2013 15 Removed the first sentence in Section 5.3.16: Communications + + interfaces + + Added ‘VIN’ in Table 9: General operating conditions + Updated first sentence in Output driving current + + Added note 5. in Table 24: HSI oscillator characteristics + + Updated ‘VIL’ and ‘VIH’ in Table 35: I/O static characteristics + Added notes to Figure 26: Standard I/O input characteristics - CMOS + port, Figure 27: Standard I/O input characteristics - TTL port, Figure 28: + 5 V tolerant I/O input characteristics - CMOS port and Figure 29: 5 V + tolerant I/O input characteristics - TTL port + + Updated Figure 32: I2C bus AC waveforms and measurement circuit + + Updated note 2. and 3.,removed note “the device must internally...” in + Table 40: I2C characteristics + + Updated title of Table 41: SCL frequency (fPCLK1= 36 MHz.,VDD_I2C + = 3.3 V) + + Updated note 2. in Table 49: ADC accuracy + + DocID13587 Rev 17 115/117 + + 116 + Revision history STM32F103x8, STM32F103xB + + Table 64. Document revision history (continued) + + Date Revision Changes + + Updated Figure 53: UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, + ultra fine pitch ball grid array package outline and Table 56: UFBGA100 + - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array + package mechanical data + + 14-May-2013 15 Updated Figure 47: LFBGA100 - 100-ball low-profile fine pitch ball grid + (continued) array, 10 x10 mm, 0.8 mm pitch, package outline and Table 53: + LFBGA100 – 100-ball low-profile fine pitch ball grid array, 10 x 10 mm, + + 0.8 mm pitch, package mechanical data + + Updated Figure 60: TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 + mm pitch, package outline and Table 59: TFBGA64 - 8 x 8 active ball + array, 5 x 5 mm, 0.5 mm pitch, package mechanical data + + Updated the reference for ‘VESD(CDM)’ in Table 32: ESD absolute + maximum ratings + + 05-Aug-2013 16 Corrected ‘tf(IO)out’ in Figure 30: I/O AC characteristics definition + + Updated Table 52: UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra + thin fine pitch quad flat package mechanical data + + Updated Table 3: STM32F103xx family removing the note. + + Updated Table 63: Ordering information scheme removing the note. + + Updated Section 6: Package information and added Section : Marking + of engineering samples for all packages. + + Updated I2C characteristics, added tSP parameter and note 4 in + Table 40: I2C characteristics. + + Updated Figure 32: I2C bus AC waveforms and measurement circuit + + 21-Aug-2015 17 swapping SCLL and SCLH. + + Updated Figure 33: SPI timing diagram - slave mode and CPHA = 0. + + Updated min/max value notes replacing ‘Guaranteed by design, not + tested in production” by “guaranteed by design”. + + Updated min/max value notes replacing ‘based on characterization, not + tested in production” by “Guaranteed based on test during + characterization”. + + Updated Table 19: Peripheral current consumption. + +116/117 DocID13587 Rev 17 + STM32F103x8, STM32F103xB + + IMPORTANT NOTICE – PLEASE READ CAREFULLY + +STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and +improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on +ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order +acknowledgement. + +Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or +the design of Purchasers’ products. + +No license, express or implied, to any intellectual property right is granted by ST herein. + +Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. + +ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. + +Information in this document supersedes and replaces information previously supplied in any prior versions of this document. + + © 2015 STMicroelectronics – All rights reserved + + DocID13587 Rev 17 117/117 + + 117 + diff --git a/Project/Output/TianyunV1.hex b/Project/Output/TianyunV1.hex index 67d639b..e771444 100644 --- a/Project/Output/TianyunV1.hex +++ b/Project/Output/TianyunV1.hex @@ -1,411 +1,281 @@ :020000040800F2 -:1000000010080020A1010008A9010008AB010008A8 -:10001000AD010008AF010008B101000800000000B8 -:10002000000000000000000000000000B301000814 -:10003000B501000800000000B701000875100008B5 -:10004000BB010008BB010008BB010008BB010008A0 -:10005000BB010008BB010008BB010008BB01000890 -:10006000BB010008BB010008BB010008BB01000880 -:10007000BB010008BB010008BB010008BB01000870 -:10008000BB010008BB010008BB010008BB01000860 -:10009000BB010008BB010008BB010008BB01000850 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+:101060004162002408E004EB8401054A02EB81019F +:1010700048688047601CC4B2022CF4DB10BD00003D +:1010800064000020AD0D0008171000080D100008C6 +:10109000C50F0008E10D00082B1000082110000802 +:1010A000D50F000810B50020FFF7F8FD10BD10B5F2 +:1010B000044621460020FFF719FE10BD6273705FE1 +:1010C000537461727454696D6572006273705F531A +:1010D000746172744175746F54696D6572006273E6 +:1010E000705F53746F7054696D6572000C11000865 +:1010F0000000002050000000180900085C110008E2 +:1011000050000020700400002809000800000000C2 +:1011100000000000000000000000000000000000CF +:1011200000000000000000000000000000000000BF +:101130000000000000A24A040000000000000000BF +:10114000010203040607080900000000010203046D +:0C11500001020304060708090204060857 :04000005080000ED02 :00000001FF diff --git a/Project/Output/TianyunV1.map b/Project/Output/TianyunV1.map index 14c5f22..a918703 100644 --- a/Project/Output/TianyunV1.map +++ b/Project/Output/TianyunV1.map @@ -6,6 +6,7 @@ Section Cross References main.o(i.app_init) refers to app_led.o(i.app_led_init) for app_led_init main.o(i.bsp_init) refers to bsp_timer.o(i.bsp_timer_init) for bsp_timer_init + main.o(i.bsp_init) refers to bsp_usart.o(i.bsp_usart_debug_init) for bsp_usart_debug_init main.o(i.main) refers to misc.o(i.NVIC_PriorityGroupConfig) for NVIC_PriorityGroupConfig main.o(i.main) refers to main.o(i.bsp_init) for bsp_init main.o(i.main) refers to main.o(i.middleware_init) for middleware_init @@ -14,18 +15,21 @@ Section Cross References main.o(i.middleware_init) refers to mw_led.o(i.mw_led_drv_init) for mw_led_drv_init app_led.o(i.app_led_indicator_faultMode) refers to mw_soft_timer.o(i.mw_softTimer_led_indicator_config) for mw_softTimer_led_indicator_config app_led.o(i.app_led_indicator_faultMode) refers to mw_soft_timer.o(i.mw_softTimer_get_led_indicator_timeUp_flag) for mw_softTimer_get_led_indicator_timeUp_flag + app_led.o(i.app_led_indicator_faultMode) refers to printf2.o(i.__0printf$2) for __2printf app_led.o(i.app_led_indicator_faultMode) refers to app_led.o(.data) for tmp_indicator_single_mode_state app_led.o(i.app_led_indicator_faultMode) refers to app_led.o(.bss) for led_runMode_indicator app_led.o(i.app_led_indicator_idleMode) refers to mw_soft_timer.o(i.mw_softTimer_led_indicator_config) for mw_softTimer_led_indicator_config app_led.o(i.app_led_indicator_idleMode) refers to mw_soft_timer.o(i.mw_softTimer_get_led_indicator_timeUp_flag) for mw_softTimer_get_led_indicator_timeUp_flag + app_led.o(i.app_led_indicator_idleMode) refers to printf2.o(i.__0printf$2) for __2printf app_led.o(i.app_led_indicator_idleMode) refers to app_led.o(.data) for tmp_indicator_single_mode_state app_led.o(i.app_led_indicator_idleMode) refers to app_led.o(.bss) for led_runMode_indicator app_led.o(i.app_led_indicator_runningMode) refers to mw_soft_timer.o(i.mw_softTimer_led_indicator_config) for mw_softTimer_led_indicator_config app_led.o(i.app_led_indicator_runningMode) refers to mw_soft_timer.o(i.mw_softTimer_get_led_indicator_timeUp_flag) for mw_softTimer_get_led_indicator_timeUp_flag + app_led.o(i.app_led_indicator_runningMode) refers to printf2.o(i.__0printf$2) for __2printf app_led.o(i.app_led_indicator_runningMode) refers to app_led.o(.data) for tmp_indicator_single_mode_state app_led.o(i.app_led_indicator_runningMode) refers to app_led.o(.bss) for led_runMode_indicator app_led.o(i.app_led_init) refers to mw_led.o(i.mw_get_led_obj) for mw_get_led_obj - app_led.o(i.app_led_init) refers to rt_memcpy_w.o(.text) for __aeabi_memcpy4 + app_led.o(i.app_led_init) refers to memcpya.o(.text) for __aeabi_memcpy4 app_led.o(i.app_led_init) refers to app_led.o(.bss) for led_runMode_indicator app_led.o(i.app_led_runMode_indicator_blink_process) refers to app_led.o(i.app_led_indicator_idleMode) for app_led_indicator_idleMode app_led.o(i.app_led_runMode_indicator_blink_process) refers to app_led.o(i.app_led_indicator_runningMode) for app_led_indicator_runningMode @@ -36,7 +40,7 @@ Section Cross References app_led.o(i.app_led_runMode_indicator_stateManage) refers to app_led.o(.data) for xqqDebug_indicator_mode mw_led.o(i.mw_get_led1_state) refers to bsp_led.o(i.bsp_get_led_ttlState) for bsp_get_led_ttlState mw_led.o(i.mw_get_led2_state) refers to bsp_led.o(i.bsp_get_led_ttlState) for bsp_get_led_ttlState - mw_led.o(i.mw_get_led_obj) refers to rt_memcpy_w.o(.text) for __aeabi_memcpy4 + mw_led.o(i.mw_get_led_obj) refers to memcpya.o(.text) for __aeabi_memcpy4 mw_led.o(i.mw_get_led_obj) refers to mw_led.o(.bss) for led_drv_buf mw_led.o(i.mw_led1_off) refers to bsp_led.o(i.bsp_led_off) for bsp_led_off mw_led.o(i.mw_led1_on) refers to bsp_led.o(i.bsp_led_on) for bsp_led_on @@ -95,10 +99,7 @@ Section Cross References bsp_timer.o(i.bsp_InitHardTimer) refers to misc.o(i.NVIC_Init) for NVIC_Init bsp_timer.o(i.bsp_InitHardTimer) refers to stm32f10x_tim.o(i.TIM_Cmd) for TIM_Cmd bsp_timer.o(i.bsp_InitHardTimer) refers to system_stm32f10x.o(.data) for SystemCoreClock - bsp_timer.o(i.bsp_StartAutoTimer) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - bsp_timer.o(i.bsp_StartAutoTimer) refers to _printf_s.o(.ARM.Collect$$_printf_percent$$00000014) for _printf_s - bsp_timer.o(i.bsp_StartAutoTimer) refers to _printf_str.o(.text) for _printf_str - bsp_timer.o(i.bsp_StartAutoTimer) refers to noretval__2printf.o(.text) for __2printf + bsp_timer.o(i.bsp_StartAutoTimer) refers to printf2.o(i.__0printf$2) for __2printf bsp_timer.o(i.bsp_StartAutoTimer) refers to bsp_timer.o(i.__set_PRIMASK) for __set_PRIMASK bsp_timer.o(i.bsp_StartAutoTimer) refers to bsp_timer.o(.constdata) for __FUNCTION__ bsp_timer.o(i.bsp_StartAutoTimer) refers to bsp_timer.o(.bss) for s_tTmr @@ -110,17 +111,11 @@ Section Cross References bsp_timer.o(i.bsp_StartHardTimer) refers to stm32f10x_tim.o(i.TIM_SetCompare3) for TIM_SetCompare3 bsp_timer.o(i.bsp_StartHardTimer) refers to stm32f10x_tim.o(i.TIM_SetCompare4) for TIM_SetCompare4 bsp_timer.o(i.bsp_StartHardTimer) refers to bsp_timer.o(.data) for s_TIM_CallBack1 - bsp_timer.o(i.bsp_StartTimer) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - bsp_timer.o(i.bsp_StartTimer) refers to _printf_s.o(.ARM.Collect$$_printf_percent$$00000014) for _printf_s - bsp_timer.o(i.bsp_StartTimer) refers to _printf_str.o(.text) for _printf_str - bsp_timer.o(i.bsp_StartTimer) refers to noretval__2printf.o(.text) for __2printf + bsp_timer.o(i.bsp_StartTimer) refers to printf2.o(i.__0printf$2) for __2printf bsp_timer.o(i.bsp_StartTimer) refers to bsp_timer.o(i.__set_PRIMASK) for __set_PRIMASK bsp_timer.o(i.bsp_StartTimer) refers to bsp_timer.o(.constdata) for __FUNCTION__ bsp_timer.o(i.bsp_StartTimer) refers to bsp_timer.o(.bss) for s_tTmr - bsp_timer.o(i.bsp_StopTimer) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - bsp_timer.o(i.bsp_StopTimer) refers to _printf_s.o(.ARM.Collect$$_printf_percent$$00000014) for _printf_s - bsp_timer.o(i.bsp_StopTimer) refers to _printf_str.o(.text) for _printf_str - bsp_timer.o(i.bsp_StopTimer) refers to noretval__2printf.o(.text) for __2printf + bsp_timer.o(i.bsp_StopTimer) refers to printf2.o(i.__0printf$2) for __2printf bsp_timer.o(i.bsp_StopTimer) refers to bsp_timer.o(i.__set_PRIMASK) for __set_PRIMASK bsp_timer.o(i.bsp_StopTimer) refers to bsp_timer.o(.constdata) for __FUNCTION__ bsp_timer.o(i.bsp_StopTimer) refers to bsp_timer.o(.bss) for s_tTmr @@ -139,23 +134,25 @@ Section Cross References bsp_timer.o(i.bsp_pwm_test_loop) refers to bsp_timer.o(i.bsp_DelayMS) for bsp_DelayMS bsp_timer.o(i.bsp_timer_init) refers to bsp_timer.o(.bss) for s_tTmr bsp_timer.o(i.bsp_timer_init) refers to system_stm32f10x.o(.data) for SystemCoreClock + bsp_usart.o(i.bsp_usart_debug_init) refers to stm32f10x_rcc.o(i.RCC_APB2PeriphClockCmd) for RCC_APB2PeriphClockCmd + bsp_usart.o(i.bsp_usart_debug_init) refers to stm32f10x_rcc.o(i.RCC_APB1PeriphClockCmd) for RCC_APB1PeriphClockCmd + bsp_usart.o(i.bsp_usart_debug_init) refers to stm32f10x_usart.o(i.USART_DeInit) for USART_DeInit + bsp_usart.o(i.bsp_usart_debug_init) refers to stm32f10x_gpio.o(i.GPIO_Init) for GPIO_Init + bsp_usart.o(i.bsp_usart_debug_init) refers to stm32f10x_usart.o(i.USART_Init) for USART_Init + bsp_usart.o(i.bsp_usart_debug_init) refers to stm32f10x_usart.o(i.USART_Cmd) for USART_Cmd + bsp_usart.o(i.fputc) refers to stm32f10x_usart.o(i.USART_GetFlagStatus) for USART_GetFlagStatus + bsp_usart.o(i.fputc) refers to stm32f10x_usart.o(i.USART_SendData) for USART_SendData system_stm32f10x.o(i.SetSysClock) refers to system_stm32f10x.o(i.SetSysClockTo72) for SetSysClockTo72 system_stm32f10x.o(i.SystemCoreClockUpdate) refers to system_stm32f10x.o(.data) for SystemCoreClock system_stm32f10x.o(i.SystemInit) refers to system_stm32f10x.o(i.SetSysClock) for SetSysClock - startup_stm32f10x_md.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory startup_stm32f10x_md.o(RESET) refers to startup_stm32f10x_md.o(STACK) for __initial_sp startup_stm32f10x_md.o(RESET) refers to startup_stm32f10x_md.o(.text) for Reset_Handler startup_stm32f10x_md.o(RESET) refers to bsp_timer.o(i.SysTick_Handler) for SysTick_Handler startup_stm32f10x_md.o(RESET) refers to bsp_timer.o(i.TIM2_IRQHandler) for TIM2_IRQHandler startup_stm32f10x_md.o(RESET) refers to bsp_timer.o(i.TIM3_IRQHandler) for TIM3_IRQHandler startup_stm32f10x_md.o(RESET) refers to interrupt_handler.o(i.USART1_IRQHandler) for USART1_IRQHandler - startup_stm32f10x_md.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory startup_stm32f10x_md.o(.text) refers to system_stm32f10x.o(i.SystemInit) for SystemInit - startup_stm32f10x_md.o(.text) refers to __main.o(!!!main) for __main - startup_stm32f10x_md.o(.text) refers to startup_stm32f10x_md.o(HEAP) for Heap_Mem - startup_stm32f10x_md.o(.text) refers to startup_stm32f10x_md.o(STACK) for Stack_Mem + startup_stm32f10x_md.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main stm32f10x_adc.o(i.ADC_DeInit) refers to stm32f10x_rcc.o(i.RCC_APB2PeriphResetCmd) for RCC_APB2PeriphResetCmd stm32f10x_bkp.o(i.BKP_DeInit) refers to stm32f10x_rcc.o(i.RCC_BackupResetCmd) for RCC_BackupResetCmd stm32f10x_can.o(i.CAN_DeInit) refers to stm32f10x_rcc.o(i.RCC_APB1PeriphResetCmd) for RCC_APB1PeriphResetCmd @@ -218,329 +215,269 @@ Section Cross References interrupt_handler.o(i.USART1_IRQHandler) refers to stm32f10x_usart.o(i.USART_GetITStatus) for USART_GetITStatus interrupt_handler.o(i.USART1_IRQHandler) refers to stm32f10x_usart.o(i.USART_ClearITPendingBit) for USART_ClearITPendingBit interrupt_handler.o(i.USART1_IRQHandler) refers to stm32f10x_usart.o(i.USART_ReceiveData) for USART_ReceiveData - __2printf.o(.text) refers to _printf_char_file.o(.text) for _printf_char_file - __2printf.o(.text) refers to stdio_streams.o(.bss) for __stdout - noretval__2printf.o(.text) refers to _printf_char_file.o(.text) for _printf_char_file - noretval__2printf.o(.text) refers to stdio_streams.o(.bss) for __stdout - __printf.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - _printf_str.o(.text) refers (Special) to _printf_char.o(.text) for _printf_cs_common - __printf_flags.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - __printf_flags.o(.text) refers to __printf_flags.o(.constdata) for .constdata - __printf_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - __printf_flags_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - __printf_flags_ss.o(.text) refers to __printf_flags_ss.o(.constdata) for .constdata - __printf_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit - __printf_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - __printf_flags_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit - __printf_flags_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - __printf_flags_wp.o(.text) refers to __printf_flags_wp.o(.constdata) for .constdata - __printf_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit - __printf_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - __printf_flags_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit - __printf_flags_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent - __printf_flags_ss_wp.o(.text) refers to __printf_flags_ss_wp.o(.constdata) for .constdata - _printf_s.o(.ARM.Collect$$_printf_percent$$00000014) refers (Weak) to _printf_char.o(.text) for _printf_string - _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) refers (Special) to _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017) for _printf_percent_end - __main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1 - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1 - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1 - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh - _printf_char.o(.text) refers (Weak) to _printf_str.o(.text) for _printf_str - _printf_char_file.o(.text) refers to _printf_char_common.o(.text) for _printf_char_common - _printf_char_file.o(.text) refers to ferror.o(.text) for ferror - _printf_char_file.o(.text) refers to fputc.o(i.fputc) for fputc - stdio_streams.o(.bss) refers (Special) to initio.o(.text) for _initio - stdio_streams.o(.bss) refers (Special) to initio.o(.text) for _initio - stdio_streams.o(.bss) refers (Special) to initio.o(.text) for _initio - stdio_streams.o(.data) refers (Special) to initio.o(.text) for _initio - stdio_streams.o(.data) refers (Special) to initio.o(.text) for _initio - stdio_streams.o(.data) refers (Special) to initio.o(.text) for _initio - __rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init - __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init - __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init - __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to main.o(i.main) for main - __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001 - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008 - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D - __rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap - __rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004 - _printf_char_common.o(.text) refers to __printf.o(.text) for __printf - fputc.o(i.fputc) refers to flsbuf.o(.text) for __flsbuf_byte - initio.o(.text) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000024) for __rt_lib_init_stdio_2 - initio.o(.text) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000005) for __rt_lib_shutdown_stdio_2 - initio.o(.text) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 - initio.o(.text) refers to fopen.o(.text) for freopen - initio.o(.text) refers to defsig_rtred_outer.o(.text) for __rt_SIGRTRED - initio.o(.text) refers to setvbuf.o(.text) for setvbuf - initio.o(.text) refers to fclose.o(.text) for _fclose_internal - initio.o(.text) refers to h1_free.o(.text) for free - initio.o(.text) refers to stdio_streams.o(.bss) for __stdin - initio.o(.text) refers to stdio_streams.o(.bss) for __stdout - initio.o(.text) refers to stdio_streams.o(.bss) for __stderr - initio.o(.text) refers to stdio_streams.o(.data) for __aeabi_stdin - initio.o(.text) refers to stdio_streams.o(.data) for __aeabi_stdout - initio.o(.text) refers to stdio_streams.o(.data) for __aeabi_stderr - initio.o(.text) refers to sys_io.o(.constdata) for __stdin_name - initio.o(.text) refers to sys_io.o(.constdata) for __stdout_name - initio.o(.text) refers to sys_io.o(.constdata) for __stderr_name - initio_locked.o(.text) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000024) for __rt_lib_init_stdio_2 - initio_locked.o(.text) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000005) for __rt_lib_shutdown_stdio_2 - initio_locked.o(.text) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 - initio_locked.o(.text) refers to fopen.o(.text) for freopen - initio_locked.o(.text) refers to defsig_rtred_outer.o(.text) for __rt_SIGRTRED - initio_locked.o(.text) refers to setvbuf.o(.text) for setvbuf - initio_locked.o(.text) refers to fclose.o(.text) for _fclose_internal - initio_locked.o(.text) refers to h1_free.o(.text) for free - initio_locked.o(.text) refers to stdio_streams.o(.bss) for __stdin - initio_locked.o(.text) refers to stdio_streams.o(.bss) for __stdout - initio_locked.o(.text) refers to stdio_streams.o(.bss) for __stderr - initio_locked.o(.text) refers to stdio_streams.o(.data) for __aeabi_stdin - initio_locked.o(.text) refers to stdio_streams.o(.data) for __aeabi_stdout - initio_locked.o(.text) refers to stdio_streams.o(.data) for __aeabi_stderr - initio_locked.o(.text) refers to streamlock.o(.data) for _stream_list_lock - initio_locked.o(.text) refers to sys_io.o(.constdata) for __stdin_name - initio_locked.o(.text) refers to sys_io.o(.constdata) for __stdout_name - initio_locked.o(.text) refers to sys_io.o(.constdata) for __stderr_name - sys_io.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_io.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_io.o(.text) refers to strlen.o(.text) for strlen - sys_io.o(.constdata) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_io.o(.constdata) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_io.o(.constdata) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_io.o(.constdata) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_io.o(.constdata) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_io.o(.constdata) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace - sys_stackheap_outer.o(.text) refers to startup_stm32f10x_md.o(.text) for __user_initial_stackheap - free.o(.text) refers (Special) to hguard.o(.text) for __heap$guard - free.o(.text) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - free.o(.text) refers to heapstubs.o(.text) for __Heap_Free - h1_free.o(.text) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - h1_free_mt.o(.text) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - heap2.o(i._FDIterate) refers to heap2.o(.conststring) for .conststring - heap2.o(i.___Heap_ProvideMemory$realtime) refers to fdtree.o(i._FDTree_Delete) for _FDTree_Delete - heap2.o(i.___Heap_ProvideMemory$realtime) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2.o(i.___Heap_Stats$realtime) refers to heap2.o(i._Heap2_StatsIterate) for _Heap2_StatsIterate - heap2.o(i.___Heap_Valid$realtime) refers to heap2.o(i._FDIterate) for _FDIterate - heap2.o(i.___Heap_Valid$realtime) refers to heap2.o(.conststring) for .conststring - heap2.o(i._free$realtime) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - heap2.o(i._free$realtime) refers to fdtree.o(i._FDTree_Delete) for _FDTree_Delete - heap2.o(i._free$realtime) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2.o(i._malloc$realtime) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - heap2.o(i._malloc$realtime) refers to fdtree.o(i._FDTree_FindFirst) for _FDTree_FindFirst - heap2.o(i._malloc$realtime) refers to init_alloc.o(.text) for __Heap_Full - heap2.o(i._malloc$realtime) refers to fdtree.o(i._FDTree_RemoveNode) for _FDTree_RemoveNode - heap2.o(i._malloc$realtime) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2.o(i._posix_memalign$realtime) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - heap2.o(i._posix_memalign$realtime) refers to fdtree.o(i._FDTree_FindFirst) for _FDTree_FindFirst - heap2.o(i._posix_memalign$realtime) refers to init_alloc.o(.text) for __Heap_Full - heap2.o(i._posix_memalign$realtime) refers to fdtree.o(i._FDTree_RemoveNode) for _FDTree_RemoveNode - heap2.o(i._posix_memalign$realtime) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2.o(i._realloc$realtime) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - heap2.o(i._realloc$realtime) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2.o(i._realloc$realtime) refers to h1_free.o(.text) for free - heap2.o(i._realloc$realtime) refers to h1_alloc.o(.text) for malloc - heap2.o(i._realloc$realtime) refers to fdtree.o(i._FDTree_Delete) for _FDTree_Delete - heap2.o(i._realloc$realtime) refers to rt_memcpy_w.o(.text) for __aeabi_memcpy4 - heap2mt.o(i._FDIterate) refers to heap2mt.o(.conststring) for .conststring - heap2mt.o(i.___Heap_Initialize$realtime$concurrent) refers to mutex_dummy.o(.text) for _mutex_initialize - heap2mt.o(i.___Heap_ProvideMemory$realtime$concurrent) refers to fdtree.o(i._FDTree_Delete) for _FDTree_Delete - heap2mt.o(i.___Heap_ProvideMemory$realtime$concurrent) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2mt.o(i.___Heap_Stats$realtime$concurrent) refers to heap2mt.o(i._Heap2_StatsIterate) for _Heap2_StatsIterate - heap2mt.o(i.___Heap_Valid$realtime$concurrent) refers to heap2mt.o(i._FDIterate) for _FDIterate - heap2mt.o(i.___Heap_Valid$realtime$concurrent) refers to heap2mt.o(.conststring) for .conststring - heap2mt.o(i._free$realtime$concurrent) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - heap2mt.o(i._free$realtime$concurrent) refers to fdtree.o(i._FDTree_Delete) for _FDTree_Delete - heap2mt.o(i._free$realtime$concurrent) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2mt.o(i._malloc$realtime$concurrent) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - heap2mt.o(i._malloc$realtime$concurrent) refers to fdtree.o(i._FDTree_FindFirst) for _FDTree_FindFirst - heap2mt.o(i._malloc$realtime$concurrent) refers to init_alloc.o(.text) for __Heap_Full - heap2mt.o(i._malloc$realtime$concurrent) refers to fdtree.o(i._FDTree_RemoveNode) for _FDTree_RemoveNode - heap2mt.o(i._malloc$realtime$concurrent) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2mt.o(i._posix_memalign$realtime$concurrent) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - heap2mt.o(i._posix_memalign$realtime$concurrent) refers to fdtree.o(i._FDTree_FindFirst) for _FDTree_FindFirst - heap2mt.o(i._posix_memalign$realtime$concurrent) refers to init_alloc.o(.text) for __Heap_Full - heap2mt.o(i._posix_memalign$realtime$concurrent) refers to fdtree.o(i._FDTree_RemoveNode) for _FDTree_RemoveNode - heap2mt.o(i._posix_memalign$realtime$concurrent) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2mt.o(i._realloc$realtime$concurrent) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - heap2mt.o(i._realloc$realtime$concurrent) refers to fdtree.o(i._FDTree_Insert) for _FDTree_Insert - heap2mt.o(i._realloc$realtime$concurrent) refers to h1_free.o(.text) for free - heap2mt.o(i._realloc$realtime$concurrent) refers to h1_alloc.o(.text) for malloc - heap2mt.o(i._realloc$realtime$concurrent) refers to fdtree.o(i._FDTree_Delete) for _FDTree_Delete - heap2mt.o(i._realloc$realtime$concurrent) refers to rt_memcpy_w.o(.text) for __aeabi_memcpy4 - flsbuf.o(.text) refers to stdio.o(.text) for _deferredlazyseek - flsbuf.o(.text) refers to sys_io.o(.text) for _sys_flen - flsbuf.o(.text) refers to h1_alloc.o(.text) for malloc - streamlock.o(.data) refers (Special) to initio.o(.text) for _initio - fopen.o(.text) refers to fclose.o(.text) for _fclose_internal - fopen.o(.text) refers to sys_io.o(.text) for _sys_open - fopen.o(.text) refers to fseek.o(.text) for _fseek - fopen.o(.text) refers to h1_alloc.o(.text) for malloc - fopen.o(.text) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 - fopen.o(.text) refers to stdio_streams.o(.bss) for __stdin - fclose.o(.text) refers to stdio.o(.text) for _fflush - fclose.o(.text) refers to sys_io.o(.text) for _sys_close - fclose.o(.text) refers to h1_free.o(.text) for free - fclose.o(.text) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 - fopen_locked.o(.text) refers to fclose.o(.text) for _fclose_internal - fopen_locked.o(.text) refers to sys_io.o(.text) for _sys_open - fopen_locked.o(.text) refers to fseek.o(.text) for _fseek - fopen_locked.o(.text) refers to h1_alloc.o(.text) for malloc - fopen_locked.o(.text) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 - fopen_locked.o(.text) refers to streamlock.o(.data) for _stream_list_lock - fopen_locked.o(.text) refers to stdio_streams.o(.bss) for __stdin - exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit - defsig_rtred_outer.o(.text) refers to defsig_rtred_inner.o(.text) for __rt_SIGRTRED_inner - defsig_rtred_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit - defsig_rtred_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_alloca_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002C) for __rt_lib_init_argv_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_atexit_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_clock_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_cpp_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_exceptions_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000002) for __rt_lib_init_fp_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_fp_trap_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_getenv_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000A) for __rt_lib_init_heap_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000011) for __rt_lib_init_lc_collate_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_ctype_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_monetary_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_numeric_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_time_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_preinit_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_rand_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000033) for __rt_lib_init_return - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_signal_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_stdio_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_user_alloc_1 - libinit2.o(.ARM.Collect$$libinit$$00000005) refers (Weak) to init_alloc.o(.text) for _init_alloc - libinit2.o(.ARM.Collect$$libinit$$00000010) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F - libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F - libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F - libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F - libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F - libinit2.o(.ARM.Collect$$libinit$$00000024) refers (Weak) to initio.o(.text) for _initio - libinit2.o(.ARM.Collect$$libinit$$00000026) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer - libinit2.o(.ARM.Collect$$libinit$$00000027) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer - libshutdown2.o(.ARM.Collect$$libshutdown$$00000005) refers (Weak) to initio.o(.text) for _terminateio - libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) refers (Weak) to term_alloc.o(.text) for _terminate_alloc - flsbuf_fwide.o(.text) refers to flsbuf.o(.text) for __flsbuf - libspace.o(.text) refers to libspace.o(.bss) for __libspace_start - rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit - rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls - rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 - rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit - rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls - rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 - rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000 - rt_raise.o(.text) refers to __raise.o(.text) for __raise - rt_raise.o(.text) refers to sys_exit.o(.text) for _sys_exit - rt_heap_descriptor.o(.text) refers to rt_heap_descriptor.o(.bss) for __rt_heap_descriptor_data - rt_heap_descriptor_intlibspace.o(.text) refers to libspace.o(.bss) for __libspace_start - init_alloc.o(.text) refers (Special) to hguard.o(.text) for __heap$guard - init_alloc.o(.text) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000005) for __rt_lib_init_heap_2 - init_alloc.o(.text) refers (Special) to maybetermalloc1.o(.emb_text) for _maybe_terminate_alloc - init_alloc.o(.text) refers to h1_extend.o(.text) for __Heap_ProvideMemory - init_alloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM - init_alloc.o(.text) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - init_alloc.o(.text) refers to h1_init.o(.text) for __Heap_Initialize - malloc.o(.text) refers (Special) to hguard.o(.text) for __heap$guard - malloc.o(.text) refers (Special) to init_alloc.o(.text) for _init_alloc - malloc.o(.text) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - malloc.o(.text) refers to heapstubs.o(.text) for __Heap_Alloc - h1_alloc.o(.text) refers (Special) to h1_init.o(.text) for __Heap_Initialize - h1_alloc.o(.text) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - h1_alloc.o(.text) refers to init_alloc.o(.text) for __Heap_Full - h1_alloc_mt.o(.text) refers (Special) to h1_init.o(.text) for __Heap_Initialize - h1_alloc_mt.o(.text) refers to init_alloc.o(.text) for __Heap_Full - h1_alloc_mt.o(.text) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - _printf_char_file_locked.o(.text) refers to _printf_char_common.o(.text) for _printf_char_common - _printf_char_file_locked.o(.text) refers to fputc.o(i._fputc$unlocked) for _fputc$unlocked - fseek.o(.text) refers to sys_io.o(.text) for _sys_istty - fseek.o(.text) refers to ftell.o(.text) for _ftell_internal - fseek.o(.text) refers to stdio.o(.text) for _seterr - stdio.o(.text) refers to sys_io.o(.text) for _sys_seek - fwritefast.o(.text) refers to stdio.o(.text) for _writebuf - fwritefast.o(.text) refers to flsbuf.o(.text) for __flsbuf_byte - fwritefast.o(.text) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy - fwritefast_locked.o(.text) refers to stdio.o(.text) for _writebuf - fwritefast_locked.o(.text) refers to flsbuf.o(.text) for __flsbuf_byte - fwritefast_locked.o(.text) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy - defsig_exit.o(.text) refers to sys_exit.o(.text) for _sys_exit - defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - assert_stdio.o(.text) refers to fputs.o(.text) for fputs - assert_stdio.o(.text) refers to fflush.o(.text) for fflush - assert_stdio.o(.text) refers to stdio_streams.o(.bss) for __stderr - argv_veneer.o(.emb_text) refers to no_argv.o(.text) for __ARM_get_argv - sys_exit.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_exit.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown - rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to sys_exit.o(.text) for _sys_exit - rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001 - rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003 - rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004 - maybetermalloc2.o(.emb_text) refers (Special) to term_alloc.o(.text) for _terminate_alloc - h1_extend.o(.text) refers to h1_free.o(.text) for free - h1_init_mt.o(.text) refers to mutex_dummy.o(.text) for _mutex_initialize - h1_extend_mt.o(.text) refers to h1_free_mt.o(.text) for _free_internal - fflush.o(.text) refers to stdio.o(.text) for _fflush - fflush.o(.text) refers to fseek.o(.text) for _fseek - fflush.o(.text) refers to stdio_streams.o(.bss) for __stdin - fputs.o(.text) refers to fputc.o(i.fputc) for fputc - ftell.o(.text) refers to rt_errno_addr_intlibspace.o(.text) for __aeabi_errno_addr - fflush_locked.o(.text) refers to stdio.o(.text) for _fflush - fflush_locked.o(.text) refers to fseek.o(.text) for _fseek - fflush_locked.o(.text) refers to fflush.o(.text) for _do_fflush - fflush_locked.o(.text) refers to streamlock.o(.data) for _stream_list_lock - fflush_locked.o(.text) refers to stdio_streams.o(.bss) for __stdin - __raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler - defsig_general.o(.text) refers to sys_wrch.o(.text) for _ttywrch - defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner - defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit - defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise - rt_memcpy_v6.o(.text) refers to rt_memcpy_w.o(.text) for __aeabi_memcpy4 - heapauxa.o(.text) refers to heapauxa.o(.data) for .data - _get_argv.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard - _get_argv.o(.text) refers to h1_alloc.o(.text) for malloc - _get_argv.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM - _get_argv.o(.text) refers to sys_command.o(.text) for _sys_command_string - _get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard - _get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM - _get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string - sys_wrch.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_wrch.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - rt_errno_addr.o(.text) refers to rt_errno_addr.o(.bss) for __aeabi_errno_addr_data - rt_errno_addr_intlibspace.o(.text) refers to libspace.o(.bss) for __libspace_start - term_alloc.o(.text) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) for __rt_lib_shutdown_heap_2 - term_alloc.o(.text) refers to rt_heap_descriptor_intlibspace.o(.text) for __rt_heap_descriptor - term_alloc.o(.text) refers to h1_final.o(.text) for __Heap_Finalize - defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig.o(CL$$defsig) refers to defsig_rtred_inner.o(.text) for __rt_SIGRTRED_inner - defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_cpp_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_fini_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000009) for __rt_lib_shutdown_fp_trap_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000011) for __rt_lib_shutdown_heap_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000012) for __rt_lib_shutdown_return - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_signal_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000006) for __rt_lib_shutdown_stdio_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000E) for __rt_lib_shutdown_user_alloc_1 - defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000F) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$00000011) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry12b.o(.ARM.Collect$$$$0000000E) for __rt_lib_shutdown_fini + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to bsp_usart.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to bsp_usart.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to bsp_usart.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to bsp_usart.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to bsp_usart.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to bsp_usart.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to bsp_usart.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to bsp_usart.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to bsp_usart.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to bsp_usart.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to bsp_usart.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to bsp_usart.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to bsp_usart.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to bsp_usart.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to bsp_usart.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to bsp_usart.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to bsp_usart.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to bsp_usart.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to bsp_usart.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to bsp_usart.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to bsp_usart.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to bsp_usart.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to bsp_usart.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to bsp_usart.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to bsp_usart.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to bsp_usart.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to bsp_usart.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to bsp_usart.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to bsp_usart.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to bsp_usart.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to bsp_usart.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to bsp_usart.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to bsp_usart.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to bsp_usart.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to bsp_usart.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to bsp_usart.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to bsp_usart.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to bsp_usart.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to bsp_usart.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to bsp_usart.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to bsp_usart.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to bsp_usart.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to bsp_usart.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to bsp_usart.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to bsp_usart.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to bsp_usart.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to bsp_usart.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to bsp_usart.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to bsp_usart.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to bsp_usart.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to bsp_usart.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to bsp_usart.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to bsp_usart.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to bsp_usart.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to bsp_usart.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to bsp_usart.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to bsp_usart.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to bsp_usart.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to bsp_usart.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to bsp_usart.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to bsp_usart.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to bsp_usart.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to bsp_usart.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to bsp_usart.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to bsp_usart.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to bsp_usart.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_stm32f10x_md.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_stm32f10x_md.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr ============================================================================== @@ -562,8 +499,10 @@ Removing Unused input sections from the image. Removing bsp_timer.o(i.bsp_change_pwm), (20 bytes). Removing bsp_timer.o(i.bsp_pwm_init), (156 bytes). Removing bsp_timer.o(i.bsp_pwm_test_loop), (54 bytes). + Removing bsp_usart.o(i._sys_exit), (6 bytes). Removing core_cm3.o(.emb_text), (32 bytes). Removing system_stm32f10x.o(i.SystemCoreClockUpdate), (164 bytes). + Removing startup_stm32f10x_md.o(HEAP), (512 bytes). Removing misc.o(i.NVIC_Init), (112 bytes). Removing misc.o(i.NVIC_SetVectorTable), (20 bytes). Removing misc.o(i.NVIC_SystemLPConfig), (32 bytes). @@ -809,16 +748,12 @@ Removing Unused input sections from the image. Removing stm32f10x_pwr.o(i.PWR_WakeUpPinCmd), (12 bytes). Removing stm32f10x_rcc.o(i.RCC_ADCCLKConfig), (24 bytes). Removing stm32f10x_rcc.o(i.RCC_AHBPeriphClockCmd), (32 bytes). - Removing stm32f10x_rcc.o(i.RCC_APB1PeriphClockCmd), (32 bytes). - Removing stm32f10x_rcc.o(i.RCC_APB1PeriphResetCmd), (32 bytes). - Removing stm32f10x_rcc.o(i.RCC_APB2PeriphResetCmd), (32 bytes). Removing stm32f10x_rcc.o(i.RCC_AdjustHSICalibrationValue), (24 bytes). Removing stm32f10x_rcc.o(i.RCC_BackupResetCmd), (12 bytes). Removing stm32f10x_rcc.o(i.RCC_ClearFlag), (20 bytes). Removing stm32f10x_rcc.o(i.RCC_ClearITPendingBit), (12 bytes). Removing stm32f10x_rcc.o(i.RCC_ClockSecuritySystemCmd), (12 bytes). Removing stm32f10x_rcc.o(i.RCC_DeInit), (76 bytes). - Removing stm32f10x_rcc.o(i.RCC_GetClocksFreq), (212 bytes). Removing stm32f10x_rcc.o(i.RCC_GetFlagStatus), (60 bytes). Removing stm32f10x_rcc.o(i.RCC_GetITStatus), (24 bytes). Removing stm32f10x_rcc.o(i.RCC_GetSYSCLKSource), (16 bytes). @@ -838,7 +773,6 @@ Removing Unused input sections from the image. Removing stm32f10x_rcc.o(i.RCC_SYSCLKConfig), (24 bytes). Removing stm32f10x_rcc.o(i.RCC_USBCLKConfig), (12 bytes). Removing stm32f10x_rcc.o(i.RCC_WaitForHSEStartUp), (56 bytes). - Removing stm32f10x_rcc.o(.data), (20 bytes). Removing stm32f10x_rtc.o(i.RTC_ClearFlag), (16 bytes). Removing stm32f10x_rtc.o(i.RTC_ClearITPendingBit), (16 bytes). Removing stm32f10x_rtc.o(i.RTC_EnterConfigMode), (20 bytes). @@ -997,13 +931,9 @@ Removing Unused input sections from the image. Removing stm32f10x_usart.o(i.USART_ClearFlag), (18 bytes). Removing stm32f10x_usart.o(i.USART_ClockInit), (34 bytes). Removing stm32f10x_usart.o(i.USART_ClockStructInit), (12 bytes). - Removing stm32f10x_usart.o(i.USART_Cmd), (24 bytes). Removing stm32f10x_usart.o(i.USART_DMACmd), (18 bytes). - Removing stm32f10x_usart.o(i.USART_DeInit), (156 bytes). - Removing stm32f10x_usart.o(i.USART_GetFlagStatus), (26 bytes). Removing stm32f10x_usart.o(i.USART_HalfDuplexCmd), (24 bytes). Removing stm32f10x_usart.o(i.USART_ITConfig), (74 bytes). - Removing stm32f10x_usart.o(i.USART_Init), (216 bytes). Removing stm32f10x_usart.o(i.USART_IrDACmd), (24 bytes). Removing stm32f10x_usart.o(i.USART_IrDAConfig), (18 bytes). Removing stm32f10x_usart.o(i.USART_LINBreakDetectLengthConfig), (18 bytes). @@ -1012,7 +942,6 @@ Removing Unused input sections from the image. Removing stm32f10x_usart.o(i.USART_OverSampling8Cmd), (22 bytes). Removing stm32f10x_usart.o(i.USART_ReceiverWakeUpCmd), (24 bytes). Removing stm32f10x_usart.o(i.USART_SendBreak), (10 bytes). - Removing stm32f10x_usart.o(i.USART_SendData), (8 bytes). Removing stm32f10x_usart.o(i.USART_SetAddress), (18 bytes). Removing stm32f10x_usart.o(i.USART_SetGuardTime), (16 bytes). Removing stm32f10x_usart.o(i.USART_SetPrescaler), (16 bytes). @@ -1028,8 +957,14 @@ Removing Unused input sections from the image. Removing stm32f10x_wwdg.o(i.WWDG_SetCounter), (16 bytes). Removing stm32f10x_wwdg.o(i.WWDG_SetPrescaler), (24 bytes). Removing stm32f10x_wwdg.o(i.WWDG_SetWindowValue), (40 bytes). + Removing dadd.o(.text), (334 bytes). + Removing dmul.o(.text), (228 bytes). + Removing ddiv.o(.text), (222 bytes). + Removing dfixul.o(.text), (48 bytes). + Removing cdrcmple.o(.text), (48 bytes). + Removing depilogue.o(.text), (186 bytes). -481 unused section(s) (total 20166 bytes) removed from the image. +479 unused section(s) (total 20992 bytes) removed from the image. ============================================================================== @@ -1039,139 +974,52 @@ Image Symbol Table Symbol Name Value Ov Type Size Object(Section) - ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit2.o ABSOLUTE - ../clib/angel/boardlib.s 0x00000000 Number 0 boardshut.o ABSOLUTE - ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit1.o ABSOLUTE - ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit3.o ABSOLUTE - ../clib/angel/handlers.s 0x00000000 Number 0 __scatter_copy.o ABSOLUTE - ../clib/angel/handlers.s 0x00000000 Number 0 __scatter_zi.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 rtexit.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 rtexit2.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry4.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry2.o ABSOLUTE - ../clib/angel/rt.s 0x00000000 Number 0 rt_heap_descriptor_intlibspace.o ABSOLUTE - ../clib/angel/rt.s 0x00000000 Number 0 rt_errno_addr.o ABSOLUTE - ../clib/angel/rt.s 0x00000000 Number 0 rt_heap_descriptor.o ABSOLUTE - ../clib/angel/rt.s 0x00000000 Number 0 rt_errno_addr_intlibspace.o ABSOLUTE - ../clib/angel/rt.s 0x00000000 Number 0 rt_raise.o ABSOLUTE - ../clib/angel/scatter.s 0x00000000 Number 0 __scatter.o ABSOLUTE - ../clib/angel/startup.s 0x00000000 Number 0 __main.o ABSOLUTE - ../clib/angel/sys.s 0x00000000 Number 0 sys_stackheap_outer.o ABSOLUTE - ../clib/angel/sys.s 0x00000000 Number 0 mutex_dummy.o ABSOLUTE - ../clib/angel/sys.s 0x00000000 Number 0 libspace.o ABSOLUTE - ../clib/angel/sys.s 0x00000000 Number 0 indicate_semi.o ABSOLUTE - ../clib/angel/sys.s 0x00000000 Number 0 use_no_semi.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_exit.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_io.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_wrch.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_command.o ABSOLUTE - ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE - ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE - ../clib/armsys.c 0x00000000 Number 0 _get_argv.o ABSOLUTE - ../clib/armsys.c 0x00000000 Number 0 no_argv.o ABSOLUTE - ../clib/armsys.c 0x00000000 Number 0 _get_argv_nomalloc.o ABSOLUTE - ../clib/assert.c 0x00000000 Number 0 assert_stdio.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_init_mt.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_alloc_mt.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_free_mt.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_final_mt.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_free.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_extend_mt.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_extend.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_init.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_alloc.o ABSOLUTE - ../clib/heap1.c 0x00000000 Number 0 h1_final.o ABSOLUTE - ../clib/heap2.c 0x00000000 Number 0 heap2.o ABSOLUTE - ../clib/heap2.c 0x00000000 Number 0 fdtree.o ABSOLUTE - ../clib/heap2.c 0x00000000 Number 0 heap2mt.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 hguard.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 free.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 hrguard.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 malloc.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 heapstubs.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 maybetermalloc1.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 maybetermalloc2.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 maybetermalloc2.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 maybetermalloc1.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 term_alloc.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 init_alloc.o ABSOLUTE - ../clib/heapaux.c 0x00000000 Number 0 heapauxa.o ABSOLUTE - ../clib/heapaux.c 0x00000000 Number 0 heapauxi.o ABSOLUTE - ../clib/libinit.s 0x00000000 Number 0 libshutdown2.o ABSOLUTE - ../clib/libinit.s 0x00000000 Number 0 libshutdown.o ABSOLUTE - ../clib/libinit.s 0x00000000 Number 0 libinit.o ABSOLUTE - ../clib/libinit.s 0x00000000 Number 0 libinit2.o ABSOLUTE - ../clib/memcpset.s 0x00000000 Number 0 rt_memcpy_v6.o ABSOLUTE - ../clib/memcpset.s 0x00000000 Number 0 rt_memcpy_w.o ABSOLUTE - ../clib/memcpset.s 0x00000000 Number 0 rt_memclr_w.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __printf_nopercent.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 _printf_char_file_locked.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 _printf_char_common.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __2printf.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 noretval__2printf.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __printf.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 _printf_str.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __printf_flags.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __printf_ss.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __printf_flags_ss.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __printf_wp.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __printf_flags_wp.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __printf_ss_wp.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 __printf_flags_ss_wp.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 _printf_char.o ABSOLUTE - ../clib/printf.c 0x00000000 Number 0 _printf_char_file.o ABSOLUTE - ../clib/printf_percent.s 0x00000000 Number 0 _printf_percent.o ABSOLUTE - ../clib/printf_percent.s 0x00000000 Number 0 _printf_s.o ABSOLUTE - ../clib/printf_percent.s 0x00000000 Number 0 _printf_percent_end.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_cppl_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtred_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_formal.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtred_formal.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_outer.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_general.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 __raise.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_abrt_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_other.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_segv_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_pvfn_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_stak_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_fpe_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtred_outer.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_exit.o ABSOLUTE - ../clib/signal.s 0x00000000 Number 0 defsig.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 ftell.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 initio_locked.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 ferror.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 ferror_locked.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fputc.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fputc_locked.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 initio.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fputs_locked.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fseek.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fflush_locked.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 stdio.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fwritefast.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fflush.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fwritefast_locked.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fopen_locked.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 setvbuf_locked.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fclose.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 stdio_streams.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fopen.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 streamlock.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 setvbuf.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 flsbuf.o ABSOLUTE - ../clib/stdio.c 0x00000000 Number 0 fputs.o ABSOLUTE - ../clib/stdlib.c 0x00000000 Number 0 exit.o ABSOLUTE - ../clib/string.c 0x00000000 Number 0 strlen.o ABSOLUTE - ../clib/wchar.c 0x00000000 Number 0 flsbuf_fwide.o ABSOLUTE - ../fplib/fpinit.s 0x00000000 Number 0 fpinit.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry12b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry12a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 useno.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE ..\Code\app\src\app_led.c 0x00000000 Number 0 app_led.o ABSOLUTE ..\Code\app\src\main.c 0x00000000 Number 0 main.o ABSOLUTE ..\Code\bsp\src\bsp_led.c 0x00000000 Number 0 bsp_led.o ABSOLUTE ..\Code\bsp\src\bsp_timer.c 0x00000000 Number 0 bsp_timer.o ABSOLUTE + ..\Code\bsp\src\bsp_usart.c 0x00000000 Number 0 bsp_usart.o ABSOLUTE ..\Code\isr\interrupt_handler.c 0x00000000 Number 0 interrupt_handler.o ABSOLUTE ..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\CMSIS\CM3\CoreSupport\core_cm3.c 0x00000000 Number 0 core_cm3.o ABSOLUTE ..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_md.s 0x00000000 Number 0 startup_stm32f10x_md.o ABSOLUTE @@ -1199,174 +1047,108 @@ Image Symbol Table ..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c 0x00000000 Number 0 stm32f10x_tim.o ABSOLUTE ..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c 0x00000000 Number 0 stm32f10x_usart.o ABSOLUTE ..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c 0x00000000 Number 0 stm32f10x_wwdg.o ABSOLUTE + ..\Code\middleware\DebugLog\mw_debug_log.c 0x00000000 Number 0 mw_debug_log.o ABSOLUTE ..\Code\middleware\Led\mw_led.c 0x00000000 Number 0 mw_led.o ABSOLUTE ..\Code\middleware\internal\src\mw_soft_timer.c 0x00000000 Number 0 mw_soft_timer.o ABSOLUTE ..\\Code\\library\\STM32F10x_StdPeriph_Lib_V3.6.0\\Libraries\\CMSIS\\CM3\\CoreSupport\\core_cm3.c 0x00000000 Number 0 core_cm3.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE RESET 0x08000000 Section 236 startup_stm32f10x_md.o(RESET) - !!!main 0x080000ec Section 8 __main.o(!!!main) - !!!scatter 0x080000f4 Section 52 __scatter.o(!!!scatter) - !!handler_copy 0x08000128 Section 26 __scatter_copy.o(!!handler_copy) - !!handler_zi 0x08000144 Section 28 __scatter_zi.o(!!handler_zi) - .ARM.Collect$$_printf_percent$$00000000 0x08000160 Section 0 _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) - .ARM.Collect$$_printf_percent$$00000014 0x08000160 Section 6 _printf_s.o(.ARM.Collect$$_printf_percent$$00000014) - .ARM.Collect$$_printf_percent$$00000017 0x08000166 Section 4 _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017) - .ARM.Collect$$libinit$$00000000 0x0800016a Section 2 libinit.o(.ARM.Collect$$libinit$$00000000) - .ARM.Collect$$libinit$$00000002 0x0800016c Section 0 libinit2.o(.ARM.Collect$$libinit$$00000002) - .ARM.Collect$$libinit$$00000004 0x0800016c Section 0 libinit2.o(.ARM.Collect$$libinit$$00000004) - .ARM.Collect$$libinit$$00000005 0x0800016c Section 8 libinit2.o(.ARM.Collect$$libinit$$00000005) - .ARM.Collect$$libinit$$0000000A 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000A) - .ARM.Collect$$libinit$$0000000C 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) - .ARM.Collect$$libinit$$0000000E 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000E) - .ARM.Collect$$libinit$$00000011 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000011) - .ARM.Collect$$libinit$$00000013 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000013) - .ARM.Collect$$libinit$$00000015 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000015) - .ARM.Collect$$libinit$$00000017 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000017) - .ARM.Collect$$libinit$$00000019 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000019) - .ARM.Collect$$libinit$$0000001B 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001B) - .ARM.Collect$$libinit$$0000001D 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) - .ARM.Collect$$libinit$$0000001F 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001F) - .ARM.Collect$$libinit$$00000021 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000021) - .ARM.Collect$$libinit$$00000023 0x08000174 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000023) - 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bsp_timer.o(.constdata) + __FUNCTION__ 0x080010cb Data 19 bsp_timer.o(.constdata) + __FUNCTION__ 0x080010de Data 14 bsp_timer.o(.constdata) .data 0x20000000 Section 7 app_led.o(.data) led_indicator_mode 0x20000000 Data 1 app_led.o(.data) tmp_indicator_single_mode_state 0x20000001 Data 1 app_led.o(.data) @@ -1382,305 +1164,209 @@ Image Symbol Table s_TIM_CallBack2 0x20000018 Data 4 bsp_timer.o(.data) s_TIM_CallBack3 0x2000001c Data 4 bsp_timer.o(.data) s_TIM_CallBack4 0x20000020 Data 4 bsp_timer.o(.data) - .data 0x20000024 Section 20 system_stm32f10x.o(.data) - .data 0x20000038 Section 4 stdio_streams.o(.data) - .data 0x2000003c Section 4 stdio_streams.o(.data) - .data 0x20000040 Section 4 stdio_streams.o(.data) - .bss 0x20000044 Section 20 app_led.o(.bss) - led_runMode_indicator 0x20000044 Data 20 app_led.o(.bss) - .bss 0x20000058 Section 40 mw_led.o(.bss) - .bss 0x20000080 Section 48 bsp_timer.o(.bss) - s_tTmr 0x20000080 Data 48 bsp_timer.o(.bss) - .bss 0x200000b0 Section 84 stdio_streams.o(.bss) - .bss 0x20000104 Section 84 stdio_streams.o(.bss) - .bss 0x20000158 Section 84 stdio_streams.o(.bss) - .bss 0x200001ac Section 96 libspace.o(.bss) - HEAP 0x20000210 Section 512 startup_stm32f10x_md.o(HEAP) - Heap_Mem 0x20000210 Data 512 startup_stm32f10x_md.o(HEAP) - STACK 0x20000410 Section 1024 startup_stm32f10x_md.o(STACK) - Stack_Mem 0x20000410 Data 1024 startup_stm32f10x_md.o(STACK) - __initial_sp 0x20000810 Data 0 startup_stm32f10x_md.o(STACK) + .data 0x20000024 Section 4 bsp_usart.o(.data) + .data 0x20000028 Section 20 system_stm32f10x.o(.data) + .data 0x2000003c Section 20 stm32f10x_rcc.o(.data) + APBAHBPrescTable 0x2000003c Data 16 stm32f10x_rcc.o(.data) + ADCPrescTable 0x2000004c Data 4 stm32f10x_rcc.o(.data) + .bss 0x20000050 Section 20 app_led.o(.bss) + led_runMode_indicator 0x20000050 Data 20 app_led.o(.bss) + .bss 0x20000064 Section 40 mw_led.o(.bss) + .bss 0x2000008c Section 48 bsp_timer.o(.bss) + s_tTmr 0x2000008c Data 48 bsp_timer.o(.bss) + STACK 0x200000c0 Section 1024 startup_stm32f10x_md.o(STACK) Global Symbols Symbol Name Value Ov Type Size Object(Section) - BuildAttributes$$THM_ISAv4$P$D$K$B$S$PE$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$EBA8$UX$STANDARDLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + BuildAttributes$$THM_ISAv4$P$D$K$B$S$PE$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$ROPI$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE - __ARM_exceptions_init - Undefined Weak Reference - __alloca_initialize - Undefined Weak Reference + __use_no_errno 0x00000000 Number 0 useno.o ABSOLUTE + __use_no_exception_handling 0x00000000 Number 0 useno.o ABSOLUTE + __use_no_fp 0x00000000 Number 0 useno.o ABSOLUTE + __use_no_heap 0x00000000 Number 0 useno.o ABSOLUTE + __use_no_heap_region 0x00000000 Number 0 useno.o ABSOLUTE + __use_no_semihosting 0x00000000 Number 0 useno.o ABSOLUTE + __use_no_semihosting_swi 0x00000000 Number 0 useno.o ABSOLUTE + __use_no_signal_handling 0x00000000 Number 0 useno.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE __arm_fini_ - Undefined Weak Reference - __arm_preinit_ - Undefined Weak Reference __cpp_initialize__aeabi_ - Undefined Weak Reference __cxa_finalize - Undefined Weak Reference - __rt_locale - Undefined Weak Reference - __sigvec_lookup - Undefined Weak Reference - __user_heap_extent - Undefined Weak Reference - _atexit_init - Undefined Weak Reference - _call_atexit_fns - Undefined Weak Reference + __decompress - Undefined Weak Reference _clock_init - Undefined Weak Reference - _fp_trap_init - Undefined Weak Reference - _fp_trap_shutdown - Undefined Weak Reference - _get_lc_collate - Undefined Weak Reference - _get_lc_ctype - Undefined Weak Reference - _get_lc_monetary - Undefined Weak Reference - _get_lc_numeric - Undefined Weak Reference - _get_lc_time - Undefined Weak Reference - _getenv_init - Undefined Weak Reference - _handle_redirection - Undefined Weak Reference - _mutex_acquire - Undefined Weak Reference - _mutex_free - Undefined Weak Reference - _mutex_release - Undefined Weak Reference - _printf_mbtowc - Undefined Weak Reference - _printf_post_padding - Undefined Weak Reference - _printf_pre_padding - Undefined Weak Reference - _rand_init - Undefined Weak Reference - _signal_finish - Undefined Weak Reference - _signal_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference __Vectors_Size 0x000000ec Number 0 startup_stm32f10x_md.o ABSOLUTE __Vectors 0x08000000 Data 4 startup_stm32f10x_md.o(RESET) __Vectors_End 0x080000ec Data 0 startup_stm32f10x_md.o(RESET) - __main 0x080000ed Thumb Code 8 __main.o(!!!main) - __scatterload 0x080000f5 Thumb Code 0 __scatter.o(!!!scatter) - __scatterload_rt2 0x080000f5 Thumb Code 44 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libinit2.o(.ARM.Collect$$libinit$$0000000E) - __rt_lib_init_signal_1 0x08000175 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) - __rt_lib_init_stdio_2 0x08000175 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000024) - __rt_lib_init_user_alloc_1 0x08000175 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) - __rt_lib_init_alloca_1 0x08000179 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002E) - __rt_lib_init_argv_1 0x08000179 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002C) - __rt_lib_init_cpp_1 0x08000179 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000032) - __rt_lib_init_exceptions_1 0x08000179 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000030) - __rt_lib_init_return 0x08000179 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000033) - __rt_lib_init_stdio_1 0x08000179 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000025) - __rt_lib_shutdown 0x0800017b Thumb Code 0 libshutdown.o(.ARM.Collect$$libshutdown$$00000000) - __rt_lib_shutdown_cpp_1 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maybetermalloc1.o(.emb_text) - NMI_Handler 0x080001a9 Thumb Code 2 startup_stm32f10x_md.o(.text) - HardFault_Handler 0x080001ab Thumb Code 2 startup_stm32f10x_md.o(.text) - MemManage_Handler 0x080001ad Thumb Code 2 startup_stm32f10x_md.o(.text) - BusFault_Handler 0x080001af Thumb Code 2 startup_stm32f10x_md.o(.text) - UsageFault_Handler 0x080001b1 Thumb Code 2 startup_stm32f10x_md.o(.text) - SVC_Handler 0x080001b3 Thumb Code 2 startup_stm32f10x_md.o(.text) - DebugMon_Handler 0x080001b5 Thumb Code 2 startup_stm32f10x_md.o(.text) - PendSV_Handler 0x080001b7 Thumb Code 2 startup_stm32f10x_md.o(.text) - ADC1_2_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - CAN1_RX1_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - CAN1_SCE_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel1_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel2_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel3_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel4_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel5_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel6_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel7_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI0_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI15_10_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI1_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI2_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI3_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI4_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI9_5_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - FLASH_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - I2C1_ER_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - I2C1_EV_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - I2C2_ER_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - I2C2_EV_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - PVD_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - RCC_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - RTCAlarm_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - RTC_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - SPI1_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - SPI2_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - TAMPER_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - TIM1_BRK_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - TIM1_CC_IRQHandler 0x080001bb Thumb Code 0 startup_stm32f10x_md.o(.text) - TIM1_TRG_COM_IRQHandler 0x080001bb Thumb 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init_alloc.o(.text) - __Heap_Broken 0x080009df Thumb Code 6 init_alloc.o(.text) - _init_alloc 0x080009e5 Thumb Code 94 init_alloc.o(.text) - malloc 0x08000a43 Thumb Code 94 h1_alloc.o(.text) - _fseek 0x08000aa1 Thumb Code 242 fseek.o(.text) - fseek 0x08000aa1 Thumb Code 0 fseek.o(.text) - _seterr 0x08000b99 Thumb Code 20 stdio.o(.text) - _writebuf 0x08000bad Thumb Code 84 stdio.o(.text) - _fflush 0x08000c01 Thumb Code 70 stdio.o(.text) - _deferredlazyseek 0x08000c47 Thumb Code 60 stdio.o(.text) - __sig_exit 0x08000c89 Thumb Code 10 defsig_exit.o(.text) - __rt_SIGRTRED_inner 0x08000c95 Thumb Code 14 defsig_rtred_inner.o(.text) - strlen 0x08000cc9 Thumb Code 62 strlen.o(.text) - _sys_exit 0x08000d09 Thumb Code 8 sys_exit.o(.text) - __Heap_Initialize 0x08000d15 Thumb Code 10 h1_init.o(.text) - __Heap_DescSize 0x08000d1f Thumb Code 4 h1_init.o(.text) - __Heap_ProvideMemory 0x08000d23 Thumb Code 52 h1_extend.o(.text) - _ftell_internal 0x08000d57 Thumb Code 66 ftell.o(.text) - ftell 0x08000d57 Thumb Code 0 ftell.o(.text) - __default_signal_display 0x08000d99 Thumb Code 50 defsig_general.o(.text) - __rt_SIGRTMEM 0x08000dcb Thumb Code 14 defsig_rtmem_outer.o(.text) - _ttywrch 0x08000dd9 Thumb Code 14 sys_wrch.o(.text) - __aeabi_errno_addr 0x08000de9 Thumb Code 8 rt_errno_addr_intlibspace.o(.text) - __errno$intlibspace 0x08000de9 Thumb Code 0 rt_errno_addr_intlibspace.o(.text) - __rt_errno_addr$intlibspace 0x08000de9 Thumb Code 0 rt_errno_addr_intlibspace.o(.text) - __rt_SIGRTMEM_inner 0x08000df1 Thumb Code 22 defsig_rtmem_inner.o(.text) - GPIO_Init 0x08000e41 Thumb Code 278 stm32f10x_gpio.o(i.GPIO_Init) - NVIC_PriorityGroupConfig 0x08000f59 Thumb Code 10 misc.o(i.NVIC_PriorityGroupConfig) - RCC_APB2PeriphClockCmd 0x08000f6d Thumb Code 26 stm32f10x_rcc.o(i.RCC_APB2PeriphClockCmd) - SysTick_Handler 0x08001075 Thumb Code 8 bsp_timer.o(i.SysTick_Handler) - SysTick_ISR 0x0800107d Thumb Code 54 bsp_timer.o(i.SysTick_ISR) - SystemInit 0x080010c1 Thumb Code 78 system_stm32f10x.o(i.SystemInit) - TIM2_IRQHandler 0x08001121 Thumb Code 22 bsp_timer.o(i.TIM2_IRQHandler) - TIM3_IRQHandler 0x08001139 Thumb Code 158 bsp_timer.o(i.TIM3_IRQHandler) - TIM_ClearITPendingBit 0x080011ed Thumb Code 6 stm32f10x_tim.o(i.TIM_ClearITPendingBit) - TIM_GetITStatus 0x080011f3 Thumb Code 34 stm32f10x_tim.o(i.TIM_GetITStatus) - TIM_ITConfig 0x08001215 Thumb Code 18 stm32f10x_tim.o(i.TIM_ITConfig) - USART1_IRQHandler 0x08001229 Thumb Code 56 interrupt_handler.o(i.USART1_IRQHandler) - USART_ClearITPendingBit 0x08001265 Thumb Code 30 stm32f10x_usart.o(i.USART_ClearITPendingBit) - USART_GetITStatus 0x08001283 Thumb Code 84 stm32f10x_usart.o(i.USART_GetITStatus) - USART_ReceiveData 0x080012d7 Thumb Code 10 stm32f10x_usart.o(i.USART_ReceiveData) - app_init 0x080012e7 Thumb Code 8 main.o(i.app_init) - app_led_indicator_faultMode 0x080012f1 Thumb Code 134 app_led.o(i.app_led_indicator_faultMode) - app_led_indicator_idleMode 0x08001385 Thumb Code 138 app_led.o(i.app_led_indicator_idleMode) - app_led_indicator_runningMode 0x0800141d Thumb Code 138 app_led.o(i.app_led_indicator_runningMode) - app_led_init 0x080014b5 Thumb Code 26 app_led.o(i.app_led_init) - app_led_runMode_indicator_blink_process 0x080014d5 Thumb Code 42 app_led.o(i.app_led_runMode_indicator_blink_process) - app_led_runMode_indicator_mainProcess 0x08001505 Thumb Code 12 app_led.o(i.app_led_runMode_indicator_mainProcess) - app_led_runMode_indicator_stateManage 0x08001511 Thumb Code 34 app_led.o(i.app_led_runMode_indicator_stateManage) - bsp_CheckTimer 0x08001545 Thumb Code 48 bsp_timer.o(i.bsp_CheckTimer) - bsp_StartTimer 0x08001595 Thumb Code 80 bsp_timer.o(i.bsp_StartTimer) - bsp_get_led_ttlState 0x08001629 Thumb Code 24 bsp_led.o(i.bsp_get_led_ttlState) - bsp_init 0x08001649 Thumb Code 8 main.o(i.bsp_init) - bsp_led1_init 0x08001651 Thumb Code 46 bsp_led.o(i.bsp_led1_init) - bsp_led2_init 0x08001685 Thumb Code 46 bsp_led.o(i.bsp_led2_init) - bsp_led_off 0x080016b9 Thumb Code 24 bsp_led.o(i.bsp_led_off) - bsp_led_on 0x080016d9 Thumb Code 32 bsp_led.o(i.bsp_led_on) - bsp_timer_init 0x08001701 Thumb Code 138 bsp_timer.o(i.bsp_timer_init) - fputc 0x0800179d Thumb Code 26 fputc.o(i.fputc) - main 0x080017b7 Thumb Code 28 main.o(i.main) - middleware_init 0x080017d3 Thumb Code 8 main.o(i.middleware_init) - mw_get_led_obj 0x080017fd Thumb Code 34 mw_led.o(i.mw_get_led_obj) - mw_led_drv_init 0x0800184d Thumb Code 74 mw_led.o(i.mw_led_drv_init) - mw_softTimer_get_led_indicator_timeUp_flag 0x080018bd Thumb Code 10 mw_soft_timer.o(i.mw_softTimer_get_led_indicator_timeUp_flag) - mw_softTimer_led_indicator_config 0x080018c7 Thumb Code 14 mw_soft_timer.o(i.mw_softTimer_led_indicator_config) - __stdin_name 0x08001904 Data 4 sys_io.o(.constdata) - __stdout_name 0x08001908 Data 4 sys_io.o(.constdata) - __stderr_name 0x0800190c Data 4 sys_io.o(.constdata) - Region$$Table$$Base 0x08001910 Number 0 anon$$obj.o(Region$$Table) - Region$$Table$$Limit 0x08001930 Number 0 anon$$obj.o(Region$$Table) + __main 0x080000ed Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x080000ed Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x080000f1 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x080000f5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x080000f5 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x080000f5 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x080000f5 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_lib_shutdown_fini 0x080000fd Thumb Code 0 entry12b.o(.ARM.Collect$$$$0000000E) + __rt_final_cpp 0x08000101 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000F) + __rt_final_exit 0x08000101 Thumb Code 0 entry11a.o(.ARM.Collect$$$$00000011) + Reset_Handler 0x08000105 Thumb Code 8 startup_stm32f10x_md.o(.text) + NMI_Handler 0x0800010d Thumb Code 2 startup_stm32f10x_md.o(.text) + HardFault_Handler 0x0800010f Thumb Code 2 startup_stm32f10x_md.o(.text) + MemManage_Handler 0x08000111 Thumb Code 2 startup_stm32f10x_md.o(.text) + BusFault_Handler 0x08000113 Thumb Code 2 startup_stm32f10x_md.o(.text) + UsageFault_Handler 0x08000115 Thumb Code 2 startup_stm32f10x_md.o(.text) + SVC_Handler 0x08000117 Thumb Code 2 startup_stm32f10x_md.o(.text) + DebugMon_Handler 0x08000119 Thumb Code 2 startup_stm32f10x_md.o(.text) + PendSV_Handler 0x0800011b Thumb Code 2 startup_stm32f10x_md.o(.text) + ADC1_2_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + CAN1_RX1_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + CAN1_SCE_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + DMA1_Channel1_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + DMA1_Channel2_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + DMA1_Channel3_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + DMA1_Channel4_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + DMA1_Channel5_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + DMA1_Channel6_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + DMA1_Channel7_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + EXTI0_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + EXTI15_10_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + EXTI1_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + EXTI2_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + EXTI3_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + EXTI4_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + EXTI9_5_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + FLASH_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + I2C1_ER_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + I2C1_EV_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + I2C2_ER_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + I2C2_EV_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + PVD_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + RCC_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + RTCAlarm_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + RTC_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + SPI1_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + SPI2_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + TAMPER_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + TIM1_BRK_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + TIM1_CC_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + TIM1_TRG_COM_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + TIM1_UP_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + TIM4_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + USART2_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + USART3_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + USBWakeUp_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + USB_HP_CAN1_TX_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + USB_LP_CAN1_RX0_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + WWDG_IRQHandler 0x0800011f Thumb Code 0 startup_stm32f10x_md.o(.text) + __aeabi_memcpy 0x08000129 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x08000129 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x08000129 Thumb Code 0 memcpya.o(.text) + __scatterload 0x0800014d Thumb Code 28 init.o(.text) + __scatterload_rt2 0x0800014d Thumb Code 0 init.o(.text) + GPIO_Init 0x08000171 Thumb Code 278 stm32f10x_gpio.o(i.GPIO_Init) + NVIC_PriorityGroupConfig 0x08000289 Thumb Code 10 misc.o(i.NVIC_PriorityGroupConfig) + RCC_APB1PeriphClockCmd 0x0800029d Thumb Code 26 stm32f10x_rcc.o(i.RCC_APB1PeriphClockCmd) + RCC_APB1PeriphResetCmd 0x080002bd Thumb Code 26 stm32f10x_rcc.o(i.RCC_APB1PeriphResetCmd) + RCC_APB2PeriphClockCmd 0x080002dd Thumb Code 26 stm32f10x_rcc.o(i.RCC_APB2PeriphClockCmd) + RCC_APB2PeriphResetCmd 0x080002fd Thumb Code 26 stm32f10x_rcc.o(i.RCC_APB2PeriphResetCmd) + RCC_GetClocksFreq 0x0800031d Thumb Code 192 stm32f10x_rcc.o(i.RCC_GetClocksFreq) + SysTick_Handler 0x080004d9 Thumb Code 8 bsp_timer.o(i.SysTick_Handler) + SysTick_ISR 0x080004e1 Thumb Code 54 bsp_timer.o(i.SysTick_ISR) + SystemInit 0x08000525 Thumb Code 78 system_stm32f10x.o(i.SystemInit) + TIM2_IRQHandler 0x08000585 Thumb Code 22 bsp_timer.o(i.TIM2_IRQHandler) + TIM3_IRQHandler 0x0800059d Thumb Code 158 bsp_timer.o(i.TIM3_IRQHandler) + TIM_ClearITPendingBit 0x08000651 Thumb Code 6 stm32f10x_tim.o(i.TIM_ClearITPendingBit) + TIM_GetITStatus 0x08000657 Thumb Code 34 stm32f10x_tim.o(i.TIM_GetITStatus) + TIM_ITConfig 0x08000679 Thumb Code 18 stm32f10x_tim.o(i.TIM_ITConfig) + USART1_IRQHandler 0x0800068d Thumb Code 56 interrupt_handler.o(i.USART1_IRQHandler) + USART_ClearITPendingBit 0x080006c9 Thumb Code 30 stm32f10x_usart.o(i.USART_ClearITPendingBit) + USART_Cmd 0x080006e7 Thumb Code 24 stm32f10x_usart.o(i.USART_Cmd) + USART_DeInit 0x08000701 Thumb Code 134 stm32f10x_usart.o(i.USART_DeInit) + USART_GetFlagStatus 0x0800079d Thumb Code 26 stm32f10x_usart.o(i.USART_GetFlagStatus) + USART_GetITStatus 0x080007b7 Thumb Code 84 stm32f10x_usart.o(i.USART_GetITStatus) + USART_Init 0x0800080d Thumb Code 210 stm32f10x_usart.o(i.USART_Init) + USART_ReceiveData 0x080008e5 Thumb Code 10 stm32f10x_usart.o(i.USART_ReceiveData) + USART_SendData 0x080008ef Thumb Code 8 stm32f10x_usart.o(i.USART_SendData) + __0printf$2 0x080008f9 Thumb Code 22 printf2.o(i.__0printf$2) + __1printf$2 0x080008f9 Thumb Code 0 printf2.o(i.__0printf$2) + __2printf 0x080008f9 Thumb Code 0 printf2.o(i.__0printf$2) + __scatterload_copy 0x08000919 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_null 0x08000927 Thumb Code 2 handlers.o(i.__scatterload_null) + __scatterload_zeroinit 0x08000929 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + app_init 0x08000a13 Thumb Code 8 main.o(i.app_init) + app_led_indicator_faultMode 0x08000a1d Thumb Code 140 app_led.o(i.app_led_indicator_faultMode) + app_led_indicator_idleMode 0x08000ac1 Thumb Code 144 app_led.o(i.app_led_indicator_idleMode) + app_led_indicator_runningMode 0x08000b65 Thumb Code 144 app_led.o(i.app_led_indicator_runningMode) + app_led_init 0x08000c0d Thumb Code 26 app_led.o(i.app_led_init) + app_led_runMode_indicator_blink_process 0x08000c2d Thumb Code 42 app_led.o(i.app_led_runMode_indicator_blink_process) + app_led_runMode_indicator_mainProcess 0x08000c5d Thumb Code 12 app_led.o(i.app_led_runMode_indicator_mainProcess) + app_led_runMode_indicator_stateManage 0x08000c69 Thumb Code 34 app_led.o(i.app_led_runMode_indicator_stateManage) + bsp_CheckTimer 0x08000c9d Thumb Code 48 bsp_timer.o(i.bsp_CheckTimer) + bsp_StartTimer 0x08000ced Thumb Code 80 bsp_timer.o(i.bsp_StartTimer) + bsp_get_led_ttlState 0x08000d81 Thumb Code 24 bsp_led.o(i.bsp_get_led_ttlState) + bsp_init 0x08000da1 Thumb Code 12 main.o(i.bsp_init) + bsp_led1_init 0x08000dad Thumb Code 46 bsp_led.o(i.bsp_led1_init) + bsp_led2_init 0x08000de1 Thumb Code 46 bsp_led.o(i.bsp_led2_init) + bsp_led_off 0x08000e15 Thumb Code 24 bsp_led.o(i.bsp_led_off) + bsp_led_on 0x08000e35 Thumb Code 32 bsp_led.o(i.bsp_led_on) + bsp_timer_init 0x08000e5d Thumb Code 138 bsp_timer.o(i.bsp_timer_init) + bsp_usart_debug_init 0x08000ef9 Thumb Code 122 bsp_usart.o(i.bsp_usart_debug_init) + fputc 0x08000f7d Thumb Code 32 bsp_usart.o(i.fputc) + main 0x08000fa1 Thumb Code 28 main.o(i.main) + middleware_init 0x08000fbd Thumb Code 8 main.o(i.middleware_init) + mw_get_led_obj 0x08000fe5 Thumb Code 34 mw_led.o(i.mw_get_led_obj) + mw_led_drv_init 0x08001035 Thumb Code 74 mw_led.o(i.mw_led_drv_init) + mw_softTimer_get_led_indicator_timeUp_flag 0x080010a5 Thumb Code 10 mw_soft_timer.o(i.mw_softTimer_get_led_indicator_timeUp_flag) + mw_softTimer_led_indicator_config 0x080010af Thumb Code 14 mw_soft_timer.o(i.mw_softTimer_led_indicator_config) + Region$$Table$$Base 0x080010ec Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0800110c Number 0 anon$$obj.o(Region$$Table) g_iRunTime 0x20000010 Data 4 bsp_timer.o(.data) - SystemCoreClock 0x20000024 Data 4 system_stm32f10x.o(.data) - AHBPrescTable 0x20000028 Data 16 system_stm32f10x.o(.data) - __aeabi_stdin 0x20000038 Data 4 stdio_streams.o(.data) - __aeabi_stdout 0x2000003c Data 4 stdio_streams.o(.data) - __aeabi_stderr 0x20000040 Data 4 stdio_streams.o(.data) - led_drv_buf 0x20000058 Data 40 mw_led.o(.bss) - __stdin 0x200000b0 Data 84 stdio_streams.o(.bss) - __stdout 0x20000104 Data 84 stdio_streams.o(.bss) - __stderr 0x20000158 Data 84 stdio_streams.o(.bss) - __libspace_start 0x200001ac Data 96 libspace.o(.bss) - __temporary_stack_top$libspace 0x2000020c Data 0 libspace.o(.bss) + __stdout 0x20000024 Data 4 bsp_usart.o(.data) + SystemCoreClock 0x20000028 Data 4 system_stm32f10x.o(.data) + AHBPrescTable 0x2000002c Data 16 system_stm32f10x.o(.data) + led_drv_buf 0x20000064 Data 40 mw_led.o(.bss) + __initial_sp 0x200004c0 Data 0 startup_stm32f10x_md.o(STACK) @@ -1690,197 +1376,116 @@ Memory Map of the image Image Entry point : 0x080000ed - Load Region LR_IROM1 (Base: 0x08000000, Size: 0x00001974, Max: 0x00010000, ABSOLUTE) + Load Region LR_IROM1 (Base: 0x08000000, Size: 0x0000115c, Max: 0x00010000, ABSOLUTE) - Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00001930, Max: 0x00010000, ABSOLUTE) + Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x0000110c, Max: 0x00010000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object - 0x08000000 0x08000000 0x000000ec Data RO 593 RESET startup_stm32f10x_md.o - 0x080000ec 0x080000ec 0x00000008 Code RO 3658 * !!!main c_w.l(__main.o) - 0x080000f4 0x080000f4 0x00000034 Code RO 4009 !!!scatter c_w.l(__scatter.o) - 0x08000128 0x08000128 0x0000001a Code RO 4011 !!handler_copy c_w.l(__scatter_copy.o) - 0x08000142 0x08000142 0x00000002 PAD - 0x08000144 0x08000144 0x0000001c Code RO 4013 !!handler_zi c_w.l(__scatter_zi.o) - 0x08000160 0x08000160 0x00000000 Code RO 3653 .ARM.Collect$$_printf_percent$$00000000 c_w.l(_printf_percent.o) - 0x08000160 0x08000160 0x00000006 Code RO 3652 .ARM.Collect$$_printf_percent$$00000014 c_w.l(_printf_s.o) - 0x08000166 0x08000166 0x00000004 Code RO 3665 .ARM.Collect$$_printf_percent$$00000017 c_w.l(_printf_percent_end.o) - 0x0800016a 0x0800016a 0x00000002 Code RO 3796 .ARM.Collect$$libinit$$00000000 c_w.l(libinit.o) - 0x0800016c 0x0800016c 0x00000000 Code RO 3798 .ARM.Collect$$libinit$$00000002 c_w.l(libinit2.o) - 0x0800016c 0x0800016c 0x00000000 Code RO 3800 .ARM.Collect$$libinit$$00000004 c_w.l(libinit2.o) - 0x0800016c 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0x00000000 Code RO 3822 .ARM.Collect$$libinit$$0000001D c_w.l(libinit2.o) - 0x08000174 0x08000174 0x00000000 Code RO 3824 .ARM.Collect$$libinit$$0000001F c_w.l(libinit2.o) - 0x08000174 0x08000174 0x00000000 Code RO 3826 .ARM.Collect$$libinit$$00000021 c_w.l(libinit2.o) - 0x08000174 0x08000174 0x00000000 Code RO 3828 .ARM.Collect$$libinit$$00000023 c_w.l(libinit2.o) - 0x08000174 0x08000174 0x00000004 Code RO 3829 .ARM.Collect$$libinit$$00000024 c_w.l(libinit2.o) - 0x08000178 0x08000178 0x00000000 Code RO 3830 .ARM.Collect$$libinit$$00000025 c_w.l(libinit2.o) - 0x08000178 0x08000178 0x00000000 Code RO 3834 .ARM.Collect$$libinit$$0000002C c_w.l(libinit2.o) - 0x08000178 0x08000178 0x00000000 Code RO 3836 .ARM.Collect$$libinit$$0000002E c_w.l(libinit2.o) - 0x08000178 0x08000178 0x00000000 Code RO 3838 .ARM.Collect$$libinit$$00000030 c_w.l(libinit2.o) - 0x08000178 0x08000178 0x00000000 Code RO 3840 .ARM.Collect$$libinit$$00000032 c_w.l(libinit2.o) - 0x08000178 0x08000178 0x00000002 Code RO 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4030 i.__scatterload_null mc_w.l(handlers.o) + 0x08000928 0x08000928 0x0000000e Code RO 4031 i.__scatterload_zeroinit mc_w.l(handlers.o) + 0x08000936 0x08000936 0x00000006 Code RO 342 i.__set_PRIMASK bsp_timer.o + 0x0800093c 0x0800093c 0x000000d6 Code RO 3799 i._printf_core mc_w.l(printf2.o) + 0x08000a12 0x08000a12 0x00000008 Code RO 1 i.app_init main.o + 0x08000a1a 0x08000a1a 0x00000002 PAD + 0x08000a1c 0x08000a1c 0x000000a4 Code RO 137 i.app_led_indicator_faultMode app_led.o + 0x08000ac0 0x08000ac0 0x000000a4 Code RO 138 i.app_led_indicator_idleMode app_led.o + 0x08000b64 0x08000b64 0x000000a8 Code RO 139 i.app_led_indicator_runningMode app_led.o + 0x08000c0c 0x08000c0c 0x00000020 Code RO 140 i.app_led_init app_led.o + 0x08000c2c 0x08000c2c 0x00000030 Code RO 141 i.app_led_runMode_indicator_blink_process app_led.o + 0x08000c5c 0x08000c5c 0x0000000c Code RO 142 i.app_led_runMode_indicator_mainProcess app_led.o + 0x08000c68 0x08000c68 0x00000034 Code RO 143 i.app_led_runMode_indicator_stateManage app_led.o + 0x08000c9c 0x08000c9c 0x00000034 Code RO 343 i.bsp_CheckTimer bsp_timer.o + 0x08000cd0 0x08000cd0 0x0000001c Code RO 349 i.bsp_SoftTimerDec bsp_timer.o + 0x08000cec 0x08000cec 0x00000094 Code RO 352 i.bsp_StartTimer bsp_timer.o + 0x08000d80 0x08000d80 0x00000020 Code RO 287 i.bsp_get_led_ttlState bsp_led.o + 0x08000da0 0x08000da0 0x0000000c Code RO 2 i.bsp_init main.o + 0x08000dac 0x08000dac 0x00000034 Code RO 288 i.bsp_led1_init bsp_led.o + 0x08000de0 0x08000de0 0x00000034 Code RO 289 i.bsp_led2_init bsp_led.o + 0x08000e14 0x08000e14 0x00000020 Code RO 290 i.bsp_led_off bsp_led.o + 0x08000e34 0x08000e34 0x00000028 Code RO 291 i.bsp_led_on bsp_led.o + 0x08000e5c 0x08000e5c 0x0000009c Code RO 357 i.bsp_timer_init bsp_timer.o + 0x08000ef8 0x08000ef8 0x00000084 Code RO 550 i.bsp_usart_debug_init bsp_usart.o + 0x08000f7c 0x08000f7c 0x00000024 Code RO 551 i.fputc bsp_usart.o + 0x08000fa0 0x08000fa0 0x0000001c Code RO 3 i.main main.o + 0x08000fbc 0x08000fbc 0x00000008 Code RO 4 i.middleware_init main.o + 0x08000fc4 0x08000fc4 0x00000010 Code RO 198 i.mw_get_led1_state mw_led.o + 0x08000fd4 0x08000fd4 0x00000010 Code RO 199 i.mw_get_led2_state mw_led.o + 0x08000fe4 0x08000fe4 0x00000028 Code RO 200 i.mw_get_led_obj mw_led.o + 0x0800100c 0x0800100c 0x0000000a Code RO 201 i.mw_led1_off mw_led.o + 0x08001016 0x08001016 0x0000000a Code RO 202 i.mw_led1_on mw_led.o + 0x08001020 0x08001020 0x0000000a Code RO 203 i.mw_led2_off mw_led.o + 0x0800102a 0x0800102a 0x0000000a Code RO 204 i.mw_led2_on mw_led.o + 0x08001034 0x08001034 0x00000070 Code RO 205 i.mw_led_drv_init mw_led.o + 0x080010a4 0x080010a4 0x0000000a Code RO 250 i.mw_softTimer_get_led_indicator_timeUp_flag mw_soft_timer.o + 0x080010ae 0x080010ae 0x0000000e Code RO 251 i.mw_softTimer_led_indicator_config mw_soft_timer.o + 0x080010bc 0x080010bc 0x00000030 Data RO 359 .constdata bsp_timer.o + 0x080010ec 0x080010ec 0x00000020 Data RO 4027 Region$$Table anon$$obj.o - Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08001930, Size: 0x00000810, Max: 0x00005000, ABSOLUTE) + Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x0800110c, Size: 0x000004c0, Max: 0x00005000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object - 0x20000000 0x08001930 0x00000007 Data RW 145 .data app_led.o - 0x20000007 0x08001937 0x00000001 PAD - 0x20000008 0x08001938 0x0000001c Data RW 357 .data bsp_timer.o - 0x20000024 0x08001954 0x00000014 Data RW 561 .data system_stm32f10x.o - 0x20000038 0x08001968 0x00000004 Data RW 3669 .data c_w.l(stdio_streams.o) - 0x2000003c 0x0800196c 0x00000004 Data RW 3670 .data c_w.l(stdio_streams.o) - 0x20000040 0x08001970 0x00000004 Data RW 3671 .data c_w.l(stdio_streams.o) - 0x20000044 - 0x00000014 Zero RW 144 .bss app_led.o - 0x20000058 - 0x00000028 Zero RW 203 .bss mw_led.o - 0x20000080 - 0x00000030 Zero RW 355 .bss bsp_timer.o - 0x200000b0 - 0x00000054 Zero RW 3666 .bss c_w.l(stdio_streams.o) - 0x20000104 - 0x00000054 Zero RW 3667 .bss c_w.l(stdio_streams.o) - 0x20000158 - 0x00000054 Zero RW 3668 .bss c_w.l(stdio_streams.o) - 0x200001ac - 0x00000060 Zero RW 3863 .bss c_w.l(libspace.o) - 0x2000020c 0x08001974 0x00000004 PAD - 0x20000210 - 0x00000200 Zero RW 592 HEAP startup_stm32f10x_md.o - 0x20000410 - 0x00000400 Zero RW 591 STACK startup_stm32f10x_md.o + 0x20000000 0x0800110c 0x00000007 Data RW 145 .data app_led.o + 0x20000007 0x08001113 0x00000001 PAD + 0x20000008 0x08001114 0x0000001c Data RW 360 .data bsp_timer.o + 0x20000024 0x08001130 0x00000004 Data RW 552 .data bsp_usart.o + 0x20000028 0x08001134 0x00000014 Data RW 651 .data system_stm32f10x.o + 0x2000003c 0x08001148 0x00000014 Data RW 2312 .data stm32f10x_rcc.o + 0x20000050 - 0x00000014 Zero RW 144 .bss app_led.o + 0x20000064 - 0x00000028 Zero RW 206 .bss mw_led.o + 0x2000008c - 0x00000030 Zero RW 358 .bss bsp_timer.o + 0x200000bc 0x0800115c 0x00000004 PAD + 0x200000c0 - 0x00000400 Zero RW 681 STACK startup_stm32f10x_md.o ============================================================================== @@ -1890,104 +1495,58 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug Object Name - 596 72 0 7 20 4616 app_led.o - 208 36 0 0 0 11098 bsp_led.o - 668 126 48 28 48 22156 bsp_timer.o + 640 98 0 7 20 4608 app_led.o + 208 36 0 0 0 11054 bsp_led.o + 668 126 48 28 48 22052 bsp_timer.o + 168 14 0 4 0 223649 bsp_usart.o 0 0 0 0 0 32 core_cm3.o - 60 4 0 0 0 520 interrupt_handler.o - 52 0 0 0 0 211087 main.o - 20 10 0 0 0 623 misc.o - 224 44 0 0 40 4253 mw_led.o - 24 0 0 0 0 4197 mw_soft_timer.o - 64 26 236 0 1536 976 startup_stm32f10x_md.o - 278 0 0 0 0 2240 stm32f10x_gpio.o - 32 6 0 0 0 681 stm32f10x_rcc.o - 58 0 0 0 0 23485 stm32f10x_tim.o - 124 0 0 0 0 10182 stm32f10x_usart.o - 328 28 0 20 0 2901 system_stm32f10x.o + 60 4 0 0 0 516 interrupt_handler.o + 56 0 0 0 0 219971 main.o + 20 10 0 0 0 615 misc.o + 224 44 0 0 40 4181 mw_led.o + 24 0 0 0 0 4177 mw_soft_timer.o + 36 8 236 0 1024 960 startup_stm32f10x_md.o + 278 0 0 0 0 2224 stm32f10x_gpio.o + 340 44 0 20 0 15332 stm32f10x_rcc.o + 58 0 0 0 0 23449 stm32f10x_tim.o + 554 28 0 0 0 13861 stm32f10x_usart.o + 328 28 0 20 0 2869 system_stm32f10x.o ---------------------------------------------------------------------- - 2746 352 316 56 1644 299047 Object Totals + 3676 440 316 80 1136 549550 Object Totals 0 0 32 0 0 0 (incl. Generated) - 10 0 0 1 0 0 (incl. Padding) + 14 0 0 1 4 0 (incl. Padding) ---------------------------------------------------------------------- Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name - 8 0 0 0 0 68 __main.o - 104 0 0 0 0 84 __printf.o - 0 0 0 0 0 0 __rtentry.o - 12 0 0 0 0 0 __rtentry2.o - 6 0 0 0 0 0 __rtentry4.o - 52 8 0 0 0 0 __scatter.o - 26 0 0 0 0 0 __scatter_copy.o - 28 0 0 0 0 0 __scatter_zi.o - 44 0 0 0 0 108 _printf_char.o - 48 6 0 0 0 96 _printf_char_common.o - 36 4 0 0 0 80 _printf_char_file.o - 0 0 0 0 0 0 _printf_percent.o - 4 0 0 0 0 0 _printf_percent_end.o - 6 0 0 0 0 0 _printf_s.o - 82 0 0 0 0 80 _printf_str.o - 10 0 0 0 0 68 defsig_exit.o - 50 0 0 0 0 88 defsig_general.o - 80 58 0 0 0 76 defsig_rtmem_inner.o - 14 0 0 0 0 80 defsig_rtmem_outer.o - 52 38 0 0 0 76 defsig_rtred_inner.o - 14 0 0 0 0 80 defsig_rtred_outer.o - 18 0 0 0 0 80 exit.o - 76 0 0 0 0 88 fclose.o - 8 0 0 0 0 68 ferror.o - 470 0 0 0 0 88 flsbuf.o - 236 4 0 0 0 128 fopen.o - 26 0 0 0 0 68 fputc.o - 248 6 0 0 0 84 fseek.o - 66 0 0 0 0 76 ftell.o - 94 0 0 0 0 80 h1_alloc.o - 52 0 0 0 0 68 h1_extend.o - 78 0 0 0 0 80 h1_free.o - 14 0 0 0 0 84 h1_init.o - 6 0 0 0 0 152 heapauxi.o - 4 0 0 0 0 136 hguard.o - 0 0 0 0 0 0 indicate_semi.o - 138 0 0 0 0 168 init_alloc.o - 312 46 0 0 0 112 initio.o - 2 0 0 0 0 0 libinit.o - 14 0 0 0 0 0 libinit2.o - 2 0 0 0 0 0 libshutdown.o - 6 0 0 0 0 0 libshutdown2.o - 8 4 0 0 96 68 libspace.o - 0 0 0 0 0 0 maybetermalloc1.o - 24 4 0 0 0 84 noretval__2printf.o - 8 4 0 0 0 68 rt_errno_addr_intlibspace.o - 8 4 0 0 0 68 rt_heap_descriptor_intlibspace.o - 78 0 0 0 0 80 rt_memclr_w.o - 100 0 0 0 0 80 rt_memcpy_w.o - 2 0 0 0 0 0 rtexit.o - 10 0 0 0 0 0 rtexit2.o - 70 0 0 0 0 80 setvbuf.o - 240 6 0 0 0 156 stdio.o - 0 0 0 12 252 0 stdio_streams.o - 62 0 0 0 0 76 strlen.o - 12 4 0 0 0 68 sys_exit.o - 102 0 12 0 0 240 sys_io.o - 74 0 0 0 0 80 sys_stackheap_outer.o - 14 0 0 0 0 76 sys_wrch.o - 2 0 0 0 0 68 use_no_semi.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 4 0 0 0 0 0 entry12b.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 30 0 0 0 0 0 handlers.o + 36 8 0 0 0 68 init.o + 36 0 0 0 0 68 memcpya.o + 246 10 0 0 0 176 printf2.o ---------------------------------------------------------------------- - 3374 196 12 12 352 3836 Library Totals - 14 0 0 0 4 0 (incl. Padding) + 372 26 0 0 0 312 Library Totals + 0 0 0 0 0 0 (incl. Padding) ---------------------------------------------------------------------- Code (inc. data) RO Data RW Data ZI Data Debug Library Name - 3360 196 12 12 348 3836 c_w.l + 372 26 0 0 0 312 mc_w.l ---------------------------------------------------------------------- - 3374 196 12 12 352 3836 Library Totals + 372 26 0 0 0 312 Library Totals ---------------------------------------------------------------------- @@ -1996,15 +1555,15 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug - 6120 548 328 68 1996 298511 Grand Totals - 6120 548 328 68 1996 298511 ELF Image Totals - 6120 548 328 68 0 0 ROM Totals + 4048 466 316 80 1136 546998 Grand Totals + 4048 466 316 80 1136 546998 ELF Image Totals + 4048 466 316 80 0 0 ROM Totals ============================================================================== - Total RO Size (Code + RO Data) 6448 ( 6.30kB) - Total RW Size (RW Data + ZI Data) 2064 ( 2.02kB) - Total ROM Size (Code + RO Data + RW Data) 6516 ( 6.36kB) + Total RO Size (Code + RO Data) 4364 ( 4.26kB) + Total RW Size (RW Data + ZI Data) 1216 ( 1.19kB) + Total ROM Size (Code + RO Data + RW Data) 4444 ( 4.34kB) ============================================================================== diff --git a/Project/TianyunV1.uvprojx b/Project/TianyunV1.uvprojx index 87bb517..f2fcc8f 100644 --- a/Project/TianyunV1.uvprojx +++ b/Project/TianyunV1.uvprojx @@ -190,7 +190,7 @@ 0 0 8 - 0 + 1 0 0 0 @@ -340,7 +340,7 @@ USE_STDPERIPH_DRIVER - ..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\CMSIS\CM3\CoreSupport;..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm;..\Code\app\inc;..\Code\bsp\inc;..\Code\isr;..\Code\middleware\internal\inc;..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\STM32F10x_StdPeriph_Driver\inc;..\Code\library;..\Code\middleware\BlueTooth;..\Code\middleware\BlueTooth\HC-06;..\Code\bsp;..\Code\middleware\Led + ..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\CMSIS\CM3\CoreSupport;..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x;..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm;..\Code\app\inc;..\Code\bsp\inc;..\Code\isr;..\Code\middleware\internal\inc;..\Code\library\STM32F10x_StdPeriph_Lib_V3.6.0\Libraries\STM32F10x_StdPeriph_Driver\inc;..\Code\library;..\Code\middleware\BlueTooth;..\Code\middleware\BlueTooth\HC-06;..\Code\bsp;..\Code\middleware\Led;..\Code\middleware\DebugLog @@ -424,6 +424,11 @@ 1 ..\Code\bsp\src\bsp_timer.c + + bsp_usart.c + 1 + ..\Code\bsp\src\bsp_usart.c + @@ -599,6 +604,16 @@ MW/BLUETOOTH + + MW/DEBUGLOG + + + mw_debug_log.c + 1 + ..\Code\middleware\DebugLog\mw_debug_log.c + + +